EMAC32 - Wishbone 32-bit Ethernet Media Access Controller

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Figure 1. EMAC32 - Wishbone 32-bit Ethernet Media Access Controller.

The 32-bit Ethernet Media Access Controller component (EMAC32) is a Wishbone-compliant component providing an interface between a processor and a standard Physical Layer device (PHY) through support of the IEEE802.3 Media Independent Interface (MII).

The Controller enables write/read of the registers internal to the connected PHY device and provides a separate Wishbone Master interface for connection to external physical memory.

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Features at-a-glance

  • 10/100Mbps at Full/Half Duplex
  • MII compatible interface for connecting external 10/100Mbps PHY transceivers
  • Ethernet/IEEE802.3 compatible
  • PHY register access
  • No lower limit for external (system) clock frequency (although throughput must be enough to read/write packets from/to memory)
  • Wishbone-compliant
  • Separate Wishbone Master interface for external memory access


From an OpenBus System document, the EMAC(32) 10-100 component can be found in the Peripherals region of the OpenBus Palette panel.

From a schematic document, the EMAC32 component can be found in the FPGA Peripherals (Wishbone) integrated library (FPGA Peripherals (Wishbone).IntLib), located in the \Library\Fpga folder of the installation.

Designing with the EMAC32

Use the following links to explore use of the EMAC32 in more detail:

See Also

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