EMAC32 - Memory Layout of Receive and Transmit Buffers

The EMAC32 uses the following generic layout for the Receive and Transmit buffers:

Figure 1. Generic layout for Receive and Transmit Buffers.

The PACKET_SIZE is a 32-bit word which indicates the length of the next PACKET_DATA in bytes. The PACKET_SIZE is located at a 4-byte boundary. The PACKET_DATA contains the destination MAC address, the source MAC address, the type/length field and the data. Unused data bytes between the previous PACKET_DATA and the next PACKET_SIZE are undefined.

Receive Buffer Usage

The value in the RX_INPUT register points to the location where the next packet structure will be placed in the Receive Buffer. When receiving a packet, the EMAC32 starts writing at address RX_INPUT + 4 with the received PACKET_DATA until the whole packet is received and written to memory. After that it writes the length of the packet to address RX_INPUT and sets RX_INPUT to the first 4-byte boundary behind the PACKET_DATA field.

If the available space behind the address pointed to by the RX_INPUT register is less than the maximum space needed for a packet, 00000000h is written to address RX_INPUT and the RX_INPUT register is set to the beginning of the buffer (as defined by the value contained in the RX_START register). Figure 2 illustrates these processes.

Figure 2. Receiving data into the Receive Buffer.

Figure 2a shows the situation before the next packet is received. The Receive Buffer is empty (the output address in the RX_OUTPUT register equals the input address in the RX_INPUT register).

Figure 2b shows the situation when the next packet is received and there is enough space behind the written packet. The packet of data is written from address RX_INPUT + 4 and then the size of the packet written to address RX_INPUT. The RX_INPUT register is then updated to point to the first 4-byte boundary behind the received packet of data. At this stage, the Receive Buffer contains one packet of data.

Figure 2c shows the situation when the next packet is received and there is not enough space behind the previously received packet. A 32-bit word with value 00000000h is written to address RX_INPUT and then RX_INPUT is set to point to the beginning of the buffer. At this stage the Receive Buffer still contains only one packet of data.

Transmit Buffer Usage

The Transmit Buffer layout is similar to the Receive Buffer layout. Whereas the Receive Buffer is written by the EMAC32 and read by software, the Transmit Buffer is written by software and read by the EMAC32.

When the software decides to start over at the beginning of the buffer, 00000000h must first be written at the end of the last packet in the buffer before writing the next packet at the beginning of the buffer. Figure 3 illustrates these processes.

Figure 3. Writing data to the Transmit Buffer.

Figure 3a shows the situation before the next packet is written to the buffer. The Transmit Buffer is empty (the output address in the TX_OUTPUT register equals the input address in the TX_INPUT register) – all packets have been transmitted.

Figure 3b shows the situation when the next packet is written to the buffer and not yet transmitted. The packet of data is written from address TX_INPUT + 4 and then the size of the packet written to address TX_INPUT. The TX_INPUT register is then updated to point to the first 4-byte boundary behind the written packet of data. At this stage, the Transmit Buffer contains one packet of data.

Figure 3c shows the situation when the second packet is written to the buffer and there was not enough space behind the previously written packet. A 32-bit word with value 00000000h is written to address TX_INPUT and then TX_INPUT is set to point to the beginning of the buffer. At this stage the Transmit Buffer contains two packets of data that are yet to be transmitted.