WB_OWM - Wishbone 1-Wire Master Controller
Figure 1. WB_OWM - Wishbone 1-Wire Master Controller.
The WB_OWM is a 1-Wire® Master Controller that facilitates communications between an FPGA-based processor and external 1-Wire-compatible peripheral devices, over the 1-Wire serial bus.
The Controller handles all timing and control signals required to satisfy the 1-Wire protocol. Once mapped into the processor's peripheral I/O space it is seen and used by the processor as a dedicated 1-Wire port. The processor simply has to set up interrupts, issue control commands, and send and receive data.
Although placed in an Altium Designer-based FPGA project as a WB_OWM, this is essentially a Wishbone-compliant wrapper that allows use of the corresponding 'soft' DS1WM peripheral core (from Dallas Semiconductor Corporation™). For more information on the DS1WM, refer to the data sheet (DS1WM.pdf) available at www.maxim-ic.com.
Supply of these soft cores under the terms and conditions of the Altium End-User License Agreement does not convey nor imply any patent rights to the supplied technologies. No additional license is required from Dallas/Maxim-IC in order to use this peripheral.
Features at-a-glance
- Handles all timing and control signals for the 1-Wire bus
- Driving system clock (
CLK_I) can be in the range 3.2MHz to 128MHz
- 8-bit data bus interface to host processor
- Search ROM Accelerator
- Interrupt-driven
- Wishbone-compliant
Availability
From an OpenBus System document, the One Wire Master component can be found in the Peripherals region of the OpenBus Palette panel.
From a schematic document, the WB_OWM component can be found in the FPGA Peripherals (Wishbone) integrated library (FPGA Peripherals (Wishbone).IntLib), located in the \Library\Fpga folder of the installation.
Designing with the WB_OWM
Use the following links to explore use of the WB_OWM in more detail: