WB_USB - Configurable Wishbone Universal Serial Bus Interface Controller
Figure 1. WB_USB - Configurable Wishbone Universal Serial Bus Interface Controller.
The WB_USB peripheral provides the interface between a processor in the FPGA design and an external USB Interface device, for subsequent communications over a Universal Serial Bus (USB). The peripheral has been built specifically to interface to the EZ-USB SX2™ device (CY7C68001, from Cypress Semiconductor). This high-speed (USB 2.0) USB Interface device has a built-in USB transceiver and a Serial Interface Engine (SIE), which automatically manages the USB protocol.
If you are using Altium's Desktop NanoBoard NB2DSK01, the USB-IrDA-Ethernet Peripheral Board PB03 features a CY7C68001 device.
Although the CY7C68001 device on the PB03 is capable of providing a 16-bit bidirectional data bus, only the low-order byte (USB_D[7..0]) is used for communications with the processor. The WB_USB device therefore needs to be configured accordingly to interface to this 8-bit bus.
Features at-a-glance
- Configure for use with 8- or 16-bit USB Data bus
- Configurable from the OpenBus System document (or schematic sheet)
- Dedicated software-accessible registers provided for communication timings
- Interrupt-driven
- Wishbone-compliant
Availability
From an OpenBus System document, the USB component can be found in the Peripherals region of the OpenBus Palette panel.
From a schematic document, the WB_USB component can be found in the FPGA Peripherals (Wishbone) integrated library (FPGA Peripherals (Wishbone).IntLib), located in the \Library\Fpga folder of the installation.
Designing with the WB_USB
Use the following links to explore use of the WB_USB in more detail:
See Also
For more information on the CY7C68001 device, refer to the datasheet (CY7C68001.pdf) available at www.cypress.com.