WB_LCDCTRL_SRAM - Wishbone LCD Controller with Multiplexed Access to SRAM
Figure 1. WB_LCDCTRL_SRAM - Wishbone LCD Controller, offering additional multiplexed access to SRAM.
The LCD Controller component (WB_LCDCTRL_SRAM) provides an interface between a host processor and an LCD panel that is equipped with a KS0066U-compatible Controller.
The WB_LCDCTRL_SRAM component is an extension of the WB_LCDCTRL component. It enables you to communicate directly with any KS0066U-compatible LCD panel – or to be more specific, that panel's controller chip. The WB_LCDCTRL_SRAM simply provides marshalling of signals and timing control between a host processor on the one side and the KS0066U-compatible controller associated with the target LCD panel on the other. In addition, it provides multiplexed access to the memory address space shared by the LCD panel and SRAM components on the NanoBoard-NB1 – effectively allowing use of both components in the same design.
The Controller is used in conjunction with one of the following port components:
LCD_MEMORY0– combined LCD and SRAM Module 0 (128k)
LCD_MEMORY1– combined LCD and SRAM module 1 (128K)
LCD_MEMORY256KX8– combined LCD and both SRAM modules (256K)
These three port components can be found in the FPGA NB1 Port-Plugin integrated library (FPGA NB1 Port-Plugin.IntLib), located in the \Library\Fpga\Legacy Libraries folder of the installation.
Supply of these soft cores under the terms and conditions of the Altium End-User License Agreement does not convey nor imply any patent rights to the supplied technologies. Users are cautioned that a license may be required for any use covered by such patent rights.
Features at-a-glance
- Fully compatible with LCD panels equipped with KS0066U Controller
- Fully synchronous design
- Software-based LCD panel initialization
- Wishbone-compliant
Availability
From an OpenBus System document, the LCD Controller-SRAM component can be found in the Memories region of the OpenBus Palette panel.
From a schematic document, the WB_LCDCTRL_SRAM component can be found in the FPGA Peripherals (Wishbone) integrated library (FPGA Peripherals (Wishbone).IntLib), located in the \Library\Fpga folder of the installation.
Designing with the WB_LCDCTRL_SRAM
Use the following links to explore use of the WB_LCDCTRL_SRAM in more detail: