Release Notes for the Summer 09 release of Altium Designer

Summer 09 Build 9.0.0.17654 (from Build 8.3.0.16776)

PCB

• A crash that occurred when the PCB print settings were configured in an outjob when no PcbDoc was open has been fixed.
• The "Copy Room Formats" command will copy all the objects within or touching a room. Any free standing polygons will keep the net of the polygon they replicated.
• Pads with complex stacks will now draw properly in single layer mode in DirectX.
• Fixed drag via to properly restore the route conflict resolution to Walkaround Obstacles. The logic was changing the route conflict resolution to Push Obstacles, as Walkaround is not supported for dragging a via, but was not restoring it when the drag terminated.
• Clearance DRC now correctly compares net connected Via objects against Keepout layer objects.
• The DXF/DWG exporter has been improved to allow only the visible layers to be exported.
• Using Find Similar Objects to find the rooms with same scope will no longer cause access violation.
• Special Strings, such as .Layer_Name, are now always converted when saving a PCB in the DXF/DWG format.
• When interactive editing in DirectX, highlighted objects will no longer draw in front of the current layer, as this can obscure too much of what's being edited.
• Some Quadro and possibly other high-end cards were having redraw problems under some conditions. These have been fixed.
• In DirectX drawing mode selection rect will now be drawn in inverted colour like the cursor. They also won't cancel each other's colours out, further improving visibility.
• After changing system preferences, the DirectX scene will only rebuild when actually necessary.
• The region under the system preferences dialog will now redraw properly after the dialog closes.
• Now the Net Un-Routed (Manhattan) Length shown in the PCB Panel Nets view will have the correct value. Also if the connections for the current net are not visible then the message "Net is Hidden" will be shown because in this case the un-routed net length can't be calculated.
• The AV cause by the Max/Min HoleSize violation is now fixed.
• The CADSTAR Import Wizard now supports 32 Mechanical Layers.
• Now the "Favorite Interactive Routing Widths" dialog will resize correctly so no scrollbars will be needed and all the existing widths will be visible.
• The Allegro Import Wizard now supports 32 Mechanical Layers.
• The crash that used to happen after loading P-CAD PDIF files has been fixed.
• AD could previously crash on close after placing a room during an editing session - this has been fixed.
• "Place Line" command will no longer be restricted to 90/45 angles when the "Restrict to 90/45" option is checked. Any angle routing will be always available in this case.
• Now the dimension anchor points will be visible in DirectX. They will display as solid circles in the "Selections" color.
• Net antenna handling has been improved. Now the net antennae rule will also check any track / arcs touching the modified primitive.
• "Move Room" command will allow the user to move the locked objects as well if required. A pop-up message box will be shown asking the user if the locked objects should be moved or not.
• Now when highlighting nets any net polygons will also be highlighted.
• The Via Under SMD violations will update when the via in question is modified, added or removed.
• Any query containing the Hide property will now work as expected, including when filtering component designator or comment properties.
• New command was added to "Net Actions" sub-menu for removing selected nets from an existing NetClass.
• A new command was added to "Net Actions" sub-menu for creating a new NetClass from the nets selected in the PCB graphical view (the nets of the selected objects will be added to a new NetClass).
• Altium Designer will no longer raise an exception in the event of a graphics card failure.
• When saving a pcbdoc as DXF/DWG, text was positioned incorrectly when it was part of a component that was being converted to a block. This issue has been fixed.
• Solder Mask Sliver Rules has been improved. Now the rule will check for any solder mask objects in conjunction with the pad / via being checked. This will prevent fake slivers from being created.
• The "Copy Room Formats" command will copy the net of unconnected objects from the matching object in the source room.
• A new command was added to "Net Actions" sub-menu to add selected nets to an existing NetClass.
• Added "OK" and "Cancel" buttons to "Design Rule Checker" dialog. Prevent the document from being marked as modified if the user cancels out of the dialog.
• Now the new Custom Violations will draw when any of the Interactive Routing tools are used.
• Now the Changing the Layer Colors in The View Configuration dialog will no longer require a forced refresh.
• When exporting a board containing multiple drill pairs to gerber the drill drawing layer is now correctly generated.
• The DXF/DWG import and export now supports 32 Mechanical Layers.
• The ORCAD Import Wizard now supports 32 Mechanical Layers.
• The PADS Import Wizard now supports 32 Mechanical Layers.
• The 3D footprint view in the library browser now displays the model correctly. A similar issue with the 3D visualisation panel in the PCB editor has also been corrected.
• Now "Copy Room Formats" command will copy the target room nets correctly.
• Lighting on the top and bottom surfaces of extruded bodies is now computed correctly.
• It is now possible to create embedded board array objects in the scripting system.
• Now the Manual Router will no longer crash when placing a via.
• Now changing layers when manual routing will update the layer tabs.
• Now when manual routing the look ahead track will be drawn highlighted not dim.
• The cursor in DirectX will now be drawn in the inverse of the colour behind it to ensure it stays visible across any color backdrop.
• A problem when switching units in the pad properties dialog box whereby some of the fields ignored the unit change has been fixed.
• The rotation sphere will now be visible in orthographic mode.
• When double clicking on overlapping 3D bodies, if the ambiguity menu that pops up is cancelled by clicking elsewhere, a second ambiguity menu could appear at the same time as the 3D body properties dialog, blocking the user from being able to click on the dialog. This has been fixed.
• Changing the height of an extruded body with the numpad 3 and 9 keys will now update the standoff and overall height values correctly.
• Now the PCB document will be marked as modified if the view configuration has changed when clicking "OK" or "Apply" in the View Configuration dialog.
• Using spacebar to rotate a 3D body will now update the Z rotation value in its properties - this will ensure the rotation sticks after modifying other properties.
• The Allegro importer has been fixed for cases where pads, text and silkscreen were incorrectly positioned and rotated bottom side components.
• Zooming with ctrl+mouse wheel or using Page Up/Page Down will now zoom around the mouse cursor rather than the centre of the screen.
• DirectX will now gracefully switch to GDI and back when entering and leaving a remote desktop session. A previous fix to this had the side effect of causing 100% CPU usage all the time on some graphics cards - this fix avoids that inefficiency.
• The display of single layer polygon region keepouts in draft mode, DirectX, has been fixed.
• A new option was added in "Copy Room Formats" dialog that will allow the user to choose if he/she wants the No Net objects to be copied from the source room to the target room.
• The PCB Rules and Violations view was removed from the PCB Panel and put into a standalone view that can be used in conjunction with the PCB Panel.
• The various zooming processes available in the view menu have been made more consistent - they will now all maintain the current board side and obey the smooth 'Flyover Zoom' option.
• The display of the sheet will now update after changing its dimensions in the board options dialog.
• "Move Room" command will allow the user to move the No Net objects as well if required. A pop-up message box will be shown asking the user if the No Net objects should be moved or not.
• The P-CAD PCB importer now correctly imports copper polygon pours. Previously it was adding the point (0,0) to all polygons.
• The P-CAD Import Wizard now supports 32 Mechanical Layers.
• The P-CAD PCB importer now correctly imports complex via stacks.
• The PCB editor dialog has been improved so that the connection check box responds correctly to the system layer All On, All Off and Used On buttons. Additionally a bug has been fixed whereby after toggling the visibility for a layer that layer would not respond correctly to the All On and All Off buttons.
• The new DRC details now have their own layer so they can be coloured differently and switched on and off independently of the traditional DRC overlay markers.
• Fixed an application lockup bug in the Interactive Router when routing in HugNPush route conflict mode and changing the corner to an arc.
• Added support for new expressions related to testpoints: - TestpointTop - TestpointBottom - TestpointFabTop - TestpointFabBottom - TestpointAssyTop - TestpointAssyBottom - TestpointFab - TestpointAssy - Testpoint.
• Fixed a crash that can occur when primitives are deleted while highlighted. In particular, this fixes the new violations crashing when they're removed, and crashes involving a short undo stack.
• Component Comments that have variant values are now correctly displayed in PCB Printing and Smart PDF.
• The toe, heel and side solder fillet values for the Precision Wirewound Inductor wizard in the IPC® Compliant Footprint Wizard server were not correct and were producing erroneous results for some package data. These values have now been corrected.
• Violations created when running Batch DRC will no longer be removed at the end of the process if "Smart Track Ends" option is on and Broken Net Rule check is ON.
• When dragging the corner of two tracks joining at 45deg the system now inserts a new track that is at 45deg, whereas previously the inserted track was not aligned to any 45deg lines.
• The issue whereby the width of a dragged track would inconsistency change depending on the widths of its adjacent track has been fixed.
• When a track that terminates at a via, the system now maintain the connection to the via.
• Now polygonal regions bounding rectangle will be updated when moving region vertices so the modified region will always be selectable.
• Now any original dimensions that lost their children will be updated when loaded so all the children will be accessible and no AVs will be generated anymore.
• The ctrl+click net highlight now works regardless of the 'Apply Mask During Interactive Editing' setting.
• In the violation properties dialog the highlight button will now work in DirectX
• When the 'Show All Primitives In Highlighted Nets' option is checked, the ghost tracks when Ctrl+dragging a track in DirectX will no longer appear.
• The 'Show All Primitives In Highlighted Nets' now correctly brings primitives on all layers to the top in single layer mode.
• In the 3D models mode of the PCB panel, when the visibility of models is changed the rows no longer expand unnecessarily and no longer jump around.
• Favorite Widths form has vertical scroll bar removed.
• The crosshair will no longer go out of sync with the windows cursor when zoomed out.
• The mini PCB image in the PCB panel has been optimised, leading to speed increases when zooming or panning on large boards.
• When saving a PcbDoc as HyperLynx, blind and buried vias that span from a signal layer to an internal plane layer no longer produce access violations. Plane connection vias are also improved.
• Via start and end layers are now reassigned intelligently when they correspond to a midlayer that has been deleted from the PCB.
• Now the NC Drill report will show the correct tool travel.
• Rounded rectangles in DirectX will now draw with exactly parallel sides.
• A bug has been resolved where by duplicated subparts were created from updating a project after preforming subpart swaps in the PCB editor.
• The bounding rect for STEP models in 2D will now be updated after a linked STEP file is modified.
• The scene will now rebuild after autorouting to fix any graphical junk.
• Fixed the mouse cursor going out of sync with the crosshair cursor after repeatedly pressing Page Down to zoom out as far as possible.
• Newly pasted objects will no longer be selected while placing as this is slower and incorrect - previously the objects would become unselected anyway, as soon as the placement was confirmed.
• The redundant "Use Net Color for Highlight" option has been removed from PCB preferences.
• PCB printing and Smart PDF generation now have preferences that allow nets to use the 'Use Colour Override' option.
• Regions with very large numbers of handles will now respond quicker when editing.
• The selection boxes of dimensions, components and other group objects will now be correctly highlighted.
• Now no stray violations will remain after undoing interactive router placed objects.
• Fixed the interactive router in Walkaround Mode to not place a via such that a short-ciruit or clearance violation can occur.
• Placing and removing vias using the '2' hotkey during interactive routing now functions correctly.
• Rounded Rectangular is 100% corner radius now draws correctly in 3D.
• Now "Select Connected Copper" command will select all the objects on a net including those connected through a split plane.
• Fixed crash or program hang in Interactive Route tool due to a mishandling of duplicate vertices in a polygonal obstacle.
• The interactive route tool would crash when a region with no height or width (i.e. 2 or fewer points when represented as a polygon) was in the design.
• Now the Net Antenna violations will be removed when another track / arc is placed to complete the trace connection.
• Update screen when toggling layers in DirectX mode fixed.
• The Solder / Paste Mask expansion values will be preserved when making a PCB Library from a PCB Board.
• Fixed the interactive route tool to remove violations when the cause of the violation has been corrected. An example would be starting the route with too large a width which causes a violation, then reducing the width to correct value should automatically remove the violation.
• Fix to interactive route tool so that the pressing the spacebar to toggle the elbow side always works after starting a route.
• Fixed the interactive route tool to handle board cutout regions as an obstacle.
• Fixed the interactive route tool to choose the correct blind/buried via from the defined drill pairs. The prior logic chose the drill pair that matched the current/next layer exactly.
• Fixed the interactive router to not ignore primitives on the Keepout layer when placing a "No Net" route and one of the avoid obstacles modes is set.
• Fixed the interactive route tool to not create a DRC clearance violation when walking around a rotated round rectangular pad.
• Fixed the Interactive Route Tool to not process surrounding large arcs when the arc boundary is not close to the current route tracks. The large arc processing was causing delays in the response of the tool.
• DirectX responsiveness has been improved slightly, with approx 20% speed increase for scene rebuilds, and toggling layer visibility no longer needs any rebuild at all.
• Fixed the interactive route tool to not potentially create a clearance violation when the obstacle avoidance mode is Walkaround Obstacles, LookAhead is enabled, and a via is being dropped as a result of a layer change.
• Change the interactive route tool to not snap to a target primitive's center point when the mouse cursor moves over the primitive if the electrical snap grid is off.
• Fixed the slow response time when beginning a route with the interactive route tool. The slow response could have resulted from many clearance rules, or clearance rules with very large values.
• AutoSpacing now works when arranging rooms.
• PCB Library Auto Save no longer deselects selected objects.
• Component primitives panel of PCB library editor now correctly follows units changing between mils and mm with Q key.
• Convert Special Strings setting turned on by default for all new PCB documents.
• Now the PCB Gerber Loader will allow for loading of mid layer Gerber files (extension .G1, .G2 etc.).
• Fixed occasional crash in layer stackup legend when Windows classic theme is used.
• Some unusual conditions which could lead to a crash on close have now been fixed.

Schematic

• When drawing an Ellipse in the Schematic and Schematic Library Editors, the radii now snaps to the grid.
• The Template field on the schematic Document Options dialog has been greyed out, as it can't really be changed after a sheet has been created from a template.
• The compiled document tabs now allow Board Level Annotations and Assembly Variants information to be edited graphically.
• Sheet border and reference zone colors on a Schematic document are now printed correctly.
• Print and Print Preview from the compiled document tab of an open schematic document now gives you a print of that tab, not the Editor tab.
• Hitting F1 while hovering over a component with a HELPURL parameter no longer fails to find the help if a Design Insight hint is active.
• Creating a new schematic from a template or an existing file and then closing the schematic document no longer causes access violations.
• A new "Blanket" schematic object may be placed around any collection of nets. The Blanket applies any parameter set directives (e.g., Net Classes) on its perimeter to all nets underneath.
• The default primitive for Schematic Pins will not be changed if the Permanent setting is enabled.
• PCB rule directives added to all the nets of a net class, are now applied to the net class rather than all the nets individually.
• Dragging of harness entries no longer creates wires, but only moves the entry within its harness connector.
• The placement of Schematic Compile Mask and Blanket objects no longer remembers the size of the previous placed object.
• Objects in the Directives submenu of the Place menu now all have icons.
• A splitter has been added to the Digital IO configuration dialog to allow resizing of the input and output signal lists.
• The configurable Digital IO configuration dialog has been improved to automatically set the display style of edited signals to something which is valid for the signal width.
• Digital IO and LAX configuration dialogs allow to paste signal names from clipboard (as text).
• Fixed bug in OpenBus interrupt Manager, which prevented from editing interrupt pins, if they are not named INT_I or INT_O.
• Parameter variations can now be highlighted in both schematic prints and the compiled document view by modifying the parameter font and colour, or appending text to the parameter value. These options are available in the Variant Options dialog.
• Multiple Designators, Comments, Parameters, Harness Connector Types and Sheet Symbol Filenames can now be selected and moved in the Schematic editor.
• The schematic Convert Special Strings option is now on by default.
• Choosing a new filename in the Graphic properties dialog and then cancelling no longer loads the new image.
• Changing the font of schematic label or parameter in the dialog no longer resets the colour.
• Jump Component and Find Text on Project Documents now search logical names (of designators, net labels, and ports) regardless of whether or not your project is compiled. There is now a "Project Physical Documents" scope in Find Text which lets you search physical names explicitly. Find Text on the Current Document now searches physical names if you are on a physical document tab, or logical names if not (as you would expect). The unimplemented "Documents On Path" scope has been removed.
• Fix pop-up error 'Invalid Pointer' when importing PADS schematic library to Altium Designer.
• Device sheets are loaded when opening a new project again, so that Ctrl+Double click navigation works as expected.
• An access violation will no longer occur after placing a part multiple times on a Schematic document from the Place button on the SCH Library panel.
• The Draw Solid property is now present in the Ellipse properties dialog.

FPGA

• The controller for configuring the In System Flash resource of the Xiliinx Spartan-3AN devices no longer opens when the system failed to load the JTAG SPI bridge into the FPGA.
• Unexpected data from NanoBoard OneWire identification device is no longer causing an exception in the Devices View when opening the Instrument panel.
• The Next Configuration options (next_config_new_mode, next_config_boot_mode and next_config_addr) are no longer missing in the Options for Make Bit File of the Build stage while targeting a Spartan3A/3AN device - these options are exposed in the Advanced view.
• The Flash Controller for Xilinx Spartan-3AN devices is no longer reporting an incorrect size of file when running the Verify Again File feature.
• The Flash Controller for Xilinx Spartan-3AN devices has been improved and it is no longer taking a very long time to program the ISF devices.
• Lattice ispLEVER 7.2 is now supported.
• The Bootloader configurable component has been updated and it is now possible to set SPI controller for processor application to 8-bit or 32-bit.
• The emac32 core has been review to clear the interrupts at reset, to correct the tx-ready interrupt and to stop the core to lock at buffer end.
• The shared memory controller now synthesizes when using SRAM 1x16 configuration.
• Modifying a Verilog document is now properly resetting the FPGA flow status to non-up-to-date.
• Logic Analyzer options now handles comma, decimal input with different regional settings correctly.
• A warning message is now emitted if a latch is inferred.
• Pins with the FPGA_RESERVE_PIN contraint are now ignored when running the FPGA Signal Manager - Assign Unconstrained Signals command.
• The standalone WB_MEM_CTRL core now supports the same timing options for SRAM devices as the shared WB_SHARED_MEM_CTRL core.
• Altera Quartus II version 9.0 is now supported.
• Altera Nios II version 9.0 is now supported.
• Openbus error marker no longer shows connection lines.
• An empty architecture previously causing a synthesizer crash is now reported with an error message.
• The Digital IO instrument no longer permits the GUI to set outputs to values beyond their range (as defined by their signal width).
• Active Serial mode is now properly disengaged before configuring Cyclone-3 devices over JTAG.
• The synthesizer no longer crashes when optimizing certain large files.
• The Lattice ECP2 and ECP2M families of FPGAs have been reviewed and all known problems corrected. Some missing devices have been included into Altium Designer as a result.
• Local constraint files with the same name as system constraint files can now be added to projects. They will no longer be removed and replaced with the system constraint files.
• Components parameters are no longer merged in generated HDL netlists causing different values to be incorrectly set.
• The Add right mouse popup menu in the Devices View is no longer showing multiple similar variations of the same device (RoHS vs. Non RoHS, speed grade, temperate grade) for the one project configuration. Only the device specifically set in the configuration is shown.
• Problems where the Devices view sometimes took two refreshes to be properly updated have now been fixed.
• Programming XCF platform flash devices no longer gives errors when using Xilinx ISE 10.1.
• Attaching multiple tristate outputs from components to an external output port is now supported correctly.
• The Virtex 5 family of FPGAs has been reviewed and all known problems corrected. Some missing devices have been included into Altium Designer as a result.
• An example project displaying the color histogram of a video signal using the C to Hardware feature is now available.
• Users can now auto-connect all pins to VCC or GND with right-click menu in the Configure dialog of the Bus Joiner / Splitter component.
• Support Signed Decimal data type in Waveform Viewer.
• Xilinx ISE 11.1 is now supported.
• Fixed an occasional crash in the Digital IO nexus driver when toggling Live status in Devices View while a programmed NanoBoard is connected.
• A problem with the synthesis of memory with one write-only port and one read-only port has been resolved.
• HDL attribute "syn_ramstyle" is provided to map RAMs and ROMs at either BLOCK or DISTRIBUTED (and other fpga vendor specific) memory cells.
• Inference of memories (RAM) with separate clocks for the read and write signals is now supported by AltiumSynthesizer.
• Instrument controls used in scripts are extended with new properties, which allow to specify range (min/max) and numeric type (signed/unsigned int or float). Also assigning SignalLink property to instrument control 'tunes' this control to be in accordance with linked signal.
• Under certain circumstances, adder circuits synthesized for Altera were incorrect because the carryout signal was not properly connected.
• The scripting component TSignalInstrumentManagerWrapper has been renamed to TSignalLinkManager.
• Slew rate constraint for Spartan-3A/AN devices can now be set to Very Slow in the Constraint editor to reflect the Quiet IO standard.
• Fixed bug in OpenBus Interconnect configuration dialog: connectors linked to "memory-side" interconnect do not get address at $FFxxxxxx anymore.
• Shared Memory Controller has been improved. Flash configuration with 1x16bit interface with unused pins hidden is correctly supported.
• The Terminal Instrument no longer causes embedded applications to stop their execution if the instrument is not connected to the Devices View via parallel or USB connectivity.
• A problem with synthesis of bit vector comparisons on Lattice ECP2 has been corrected.
• Fixed accidental 'Out of resources' crash, when building FPGA project for multiple devices at once.
• Devices View remembers project associated with FPGA device when it goes offline and then comes back online.
• The Spartan 3A, 3A DSP and 3AN families of FPGAs have been reviewed and all known problems corrected. Some missing devices have been included into Altium Designer as a result.
• Buttons to control whether the frequency counter is operating on rising or falling edges have been added to its instrument.
• Altium Designer will now properly download code to the parallel flash from the 'Write To Flash ...' dialogue in the Devices View (right-click on processor).
• Altium Designer no longer hangs when starting a debug session while the targeted processor cannot be paused.
• A new version of the NB2 firmware (1.2.61) is now available. It resolves possible lockups while targeting an Altera device.
• By default the Software Platform is now compiled with the NDEBUG macro defined thereby nullifying asserts. The NDEBUG macro can be undefined by means of the Software Platform Configurator inside the Software Platform document.
• The configurable I2S controller component can now be used with the Lattice ECP2 family of FPGA devices.
• Various problems with synthesis for Lattice ECP and ECP2 have been resolved.
• The Spartan 3 family of FPGAs has been reviewed and all known problems corrected. Some missing devices have been included into Altium Designer as a result.
• The pins of configurable components are now properly lying on the pin gird.
• Fixed bug: Incomplete multiplexer latches value when selecting non-existent input.
• Using the INV component from the FPGA generic library no longer fails when the target device is an Actel Fusion FPGA.
• Components declared in Xilinx Unisim.VCOMPONENTS library can be instantiated in HDL.
• Bus Importers in OpenBus documents are now wired up correctly regardless of the width of the Importers' address and data busses.
• Plug-Ins components for the User Header A and B connectors of the NanoBoard NB2 have been added to the FPGA NB2DSK01 Port-Plugin library.
• The configurator adder/subtractor is now synthesizing and working correctly with a signal width of 1.
• Configurable Adder/Subtractor now add/subtracts correctly when using non-bussed inputs.
• Bit vector types in VHDL are now correctly translated into hex strings during synthesis.
• The SPI Bootloader can now be used with serial flash memory not connected to the FPGA through the NB2 SPI multiplexer.
• A problem which occasionally caused incorrect adders to be synthesized has been corrected.
• The Configurable USB core now synthesizes correctly when the synthesizer being used is XST.
• FPGA constraints with invalid HDL identifier are now corrected before being passed to the vendor tools. This fixes problems when using third party synthesizers like XST and port identifiers which do not use valid HDL syntax.
• New Logic Analyzer option to automatically connect spare pins to GND.
• The Logic Analyzer now supports signed decimal formatting in the data panel.
• Altera QuartusII 32-Bit version is now properly recognized when installed on a 64-Bit operating system.
• A number of default styles has been added to the wave preferences and an 'Auto Colors' button has been added to the logic analyzer configurator. Together these changes make it easy to get waveforms displaying a range of colors to make each signal distinct.
• Some trigonometric function (including sin, cos, ...) are now behaving as expected when targeting an Altera device and pushed into hardware using the C to Hardware feature.
• The right mouse click menu "Configuration Flash > Program Flash With Current Project" in the Devices view for Spartan-3AN devices is now disabled when the project has not been build.
• IDE core is now revised. A bug was fixed when writing to memory using DMA while memory is busy.
• A new configurable wishbone LED Controller (WB_LED_CTRL) component has been added to the FPGA Peripherals (Wishbone) integrated library. The wishbone LED controller is also available as a Software Platform Plugin.
• The Configurable Counter now supports signal widths up to and including 32 bits.

System-level

• Editing data in place in the SVN Database Library table browser now properly saves changes to the database.
• In Smart PDF and Publish To PDF the bookmark order now matches the project hierarchy order, and the sheet order now matches the Annotate Compiled Sheets order.
• The OrCAD importer now recognizes .DSN files saved by OrCAD 10.x.
• A new project option has been added to the Options tab, to allow single pin nets to be added to generated netlist files and to synchronise to PCBs. The generation of net classes for components also now only adds single pin nets to the net class if this option is checked.
• There is now a .VariantName special string on PCBDOC's which is evaluated as the variant name when generating prints and other outputs.
• You will be prompted for a username and password if you have "Sign in at startup" checked but not "Remember" username and password. You will also be prompted if you click "Sign in" on the My Account page.
• A print preview bug preventing display of more than approximately 40 pages has been fixed.
• Deleting the normal display mode will no longer delete all the parameters in a Schematic Library component.
• Added option to open HTML links in external Web browser. It can be found in Preferences - System - View page, General group. By default this option is off.
• The last open workspace no longer disappears if you start Altium Designer with no license.
• The schematic reference info including Design Item ID, Description and Library Name are now synchronised to the PCB. And field comparisons have been made case sensitive.
• It is now possible to add, remove and edit components in a Database Library.
• Live Supplier information from Newark is now available in the Supplier Search panel.
• Live Supplier information from Farnell is now available in the Supplier Search panel.
• The project option "Push Component Designator Changes to Annotation File" now only applies if the project already contains a .Annotation file. It does not create a new .Annotation file in a project that has never used board-level annotations.
• In Smart PDF in the PCB Printout Settings if a check box was clicked and then Next or Finish was clicked the change to the check box was ignored during output. This has been fixed.
• You can now import Supplier parameters, pricing, stock and datasheet links into your SCHDOCs, SCHLIBs, SVNDBLibs and DBLIBs by dragging and dropping from the detail section of the Supplier Search panel. You can also create whole new components in SCHLIB from Supplier data by dragging and dropping into the components section of the SCH Library panel. New components can also be added to SVNDBLibs and DBLibs.
• The Change Component Footprint ECO no longer fails with error "Component not found in available libraries." if the PCBLIB file isn't open.
• Print Preview now consumes much less Windows GDI resources, so large previews which used to give "Out of system resources" errors should now work without error.
• The keyboard accelerator to select the current column in the PCB List panel has been changed from Shift+A to Ctrl+Space (as in the SCH List panel). Ctrl keyboard accelerators like Ctrl+Z and Ctrl+Y now work while editing in the SCH List and PCB List panels. Hitting Enter while editing in the SCH List panel now advances the cursor to the next row (just like the PCB List panel).
• The Print Preview dialog has been given a minimum width so that the close button does not move behind other controls.
• Tool Palette in script documents now remembers and restore expanded/collapsed state of categories.
• Code completion now works for the form object and all controls on it, for script units containing forms.
• You can now convert currencies for all prices displayed in the Supplier Search panel, Supplier Links dialog, and Bill of Materials. The exchange rates are retrieved daily from your Altium account (provided you are signed in).
• The form to choose the start point for a script project has been improved. Modules which contain only forms or scripts now have different icons, and invalid items are no longer shown.
• The file name in the HTML DRC Report is now a local file hyperlink only for Generate Files output media, not Publish To Web.
• In the PDF DRC Report, word wrapping and dynamic height of text area has been removed to improve report overall look. With a static height for text we no longer get text wrapping onto the next page.
• The Filename in the HTML ERC Report is now a full path, with a local file hyperlink only for Generate Files output media, not Publish to Web.
• Fixed paint bug in Import Changes from FPGA Project wizard.
• Fixed paint bug in Synthesis tab of Project Options dialog.
• The Bill of Materials now has an option to round up Supplier Order Quantity to the next price break if this results in a lower overall price.
• The CADSTAR importer now scales Document symbol primitives correctly.
• There are now two backup Account Management servers in addition to the primary server.
• Copying and pasting I/O, Open Collector, and Open Emitter Pin Electrical types now works as expected in the SCH List panel.
• Some cryptic error messages (such as Error 12029) reported when signing in to Altium Account Management have been translated into English.
• Live Supplier data is now available in scripts.
• The Parameter Manager now includes a Database Table Name system parameter.
• Publishing a DRC Report To Web using File System, now uses the PcbDoc's file name, not the project's.
• The P-CAD importer now imports pads with a Top Mask expansion that is uniform in the height and width dimensions to a correct Solder Mask Expansion in Altium Designer, instead of a Solder Mask Expansion of -1000 mil.
• After performing an Advanced Library Search, changing to Simple Search will now populate filter fields correctly.
• The Intergraph netlister no longer truncates footprint names, transliterates _ to /, or outputs lines longer than 80 characters. This should make Intergraph netlists generated from Altium Designer more compatible with other tools such as Expedition.
• Pasting to a selection of disjoint rows in the SCH List and PCB List panels now works correctly.
• Non-English characters on the My Account page are no longer garbled (provided your Language for non-Unicode programs in Windows Regional and Language Options is set to the same language).

Embedded

• Printf now outputs properly to the Output panel while in debug mode.
• The syntax of the User Macro field for the Compiler Preprocessor is now a comma separated list of items of the form <macro_name>[=<value>], for example MACRO1,Macro2=3
• The macro editor table for preprocessor definitions no longer appears at the wrong position in the top-left-hand corner of the display.
• If the display width of the Nexus Debugger is set to a single byte the register values of 8-bit peripherals will be shown correctly in the memory window (but not register values of 32-bit peripherals).
• The RTOS debug window can only be accessed if the application uses POSIX thread support. In that case the window shows thread statuses.
• When the software platform document is synchronized with the FPGA project a warning will be issued against unconnected interrupts if the driver can't run without interrupts.
• All programming interfaces of the Software Platform are now available to the application, not only those on top of the device stacks.
• Replace in files in the text editor now works as expected.
• When changing the discrete processor chip device in the Compiler Options tab of the embedded project, the memories in the Device Memory column of the Configure Memory are updated automatically to represent the on-chip memories of the selected chip.

Signal Integrity and Simulation

• Bool and PWR functions in the waveform viewer now parse correctly.
• The handling of unusual ascii characters in SPICE input files has been improved.
• A crash occurring when Level 2 MOSFETS were used with the flicker noise exponent parameter (af) specified has been fixed.
• You can now script the import of .CSV files into the waveform editor. See Examples\Scripts\Delphiscript Scripts\Processes\ImportWaveforms.pas for an example.
• A problem simulating ECL components with negative voltage supplies has been fixed.

CAM Editor

• Allow the IPC Netlist Export to create a correct output even if no solder mask layers exist.
• The "View / Change Layers Order" dialog has been improved. Now the user will be able to change the order from Up-Down to Down-Up. The old ordering using drag and drop of the layers in the list view is still available. The current layer will be drawn Bold.

Library Management

• In the past, if two footprints share the same 32 characters in their names the library can not be saved. This problem has been fixed.
• In the past, if two components share the same first 31 characters in their names the new component is lost when the schematic library is saved and re-opened. This problem has been fixed.
• The unreadable labels on the second page of the SOT143/343 Footprint Wizard have been fixed.
• The error "Item cannot be found in the collection corresponding to the requested name or ordinal" that occurs when you type in a filter string in the Libraries panel while showing one table of a DBLIB attached to a Microsoft Access database, and then change to a table where a field corresponding to one of the shown Columns does not exist has been fixed.
• Selecting a DBLIB in the Libraries panel with the "Auto show symbol and model previews" option off before any SchDoc or SchLib documents have been opened no longer leaves the library in a limbo state leading to crashes.
• The PCB Model dialog can browse for and find footprints in installed IntLibs again when the "PCB Library" option is set to "Any".