Introduction to C-to-Hardware Compilation Technology in Altium Designer

Frozen Content

Altium Designer features powerful C-to-Hardware Compilation (CHC) technology. At the heart of this technology is the C-to-Hardware Compiler. The Compiler takes C source code as input and produces FPGA logic as output. Altium Designer's integrated development environment and intuitive GUI essentially mean the CHC technology becomes a 'black box' as far as the designer is concerned – simply write C code on the one side and obtain the FPGA logic on the other, without ever needing to learn the intricacies of the C-to-Hardware Compiler itself!

Figure 1. High-level illustration of C-to-Hardware compilation in Altium Designer.

In terms of FPGA design within Altium Designer, there are two ways in which the CHC technology can be used:

  • To design custom FPGA logic using C. In this case the CHC technology is used to translate a single C source function – referenced using a C Code Symbol – into a hardware function. The end result is an independent module of FPGA logic which connects, through defined IO ports, to other areas of the circuit design.

Figure 2. Using CHC technology to design custom FPGA logic using C. A single C function is converted into
an FPGA logic module through use of a C Code Symbol.

  • To accelerate processor systems. In this case, the CHC technology is used to translate specified software functions in the C source code into hardware functions, which can be called by the embedded software running on a 'soft' processor in the design.

The C-to-Hardware Compiler is used in conjunction with Altium Designer's traditional embedded software compilers to build a system in which an embedded processor can offload critical functions to hardware. Access to, and control over, the generated hardware functions, is made possible through use of an appropriately-configured Application Specific Processor peripheral component (ASP).

Figure 3. Using CHC technology to accelerate a processor system. From the source code, the majority of functions
will be compiled by an embedded software compiler to run on the CPU. One or more software functions are
translated, using CHC, to hardware circuits and 'stored' within an ASP peripheral.

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