NanoBoard 3000 - Common-Bus SRAM

Frozen Content

The NanoBoard 3000 includes Static RAM as part of the common-bus block of memory resources available to the on-board User FPGA device, or more specifically a programmed design therein.

Common-bus SRAM available to an FPGA design.

The SRAM is provided in the form of two 4Mbit, high-speed CMOS SRAM devices. Each device is organized as 256K x 16 bits – combined together to give 256K x 32-bit storage (1MByte). Both devices are powered by the motherboard's 3.3V supply.

Location on Board

The common-bus SRAM devices (designated U16 and U17) are located on the component side of the board, to the right of the User FPGA (U8).

Schematic Reference

The common-bus SRAM devices can be found on Sheet 26 (SRAM_256Kx32_TSOP44_1.SchDoc, entitled 256K x 32 SRAM - TSOP44 x 2) of the motherboard schematics.

The common-bus memory block and interface wiring can be found on Sheet 25 (CommonMemory.SchDoc, entitled Common-Bus Memory Block).

Design Interface Component

A variety of design interface components are available from the FPGA NB3000 Port-Plugin.IntLib for access to, and communications with, any or all of the common-bus resources. The design interface component used will depend on which particular resource(s) you wish to access, and how you have configured the Shared Memory Controller – the intermediate design peripheral that sits between a processor in the design and the common-bus resource on the board. For more information, see Accessing Common-Bus Resources on the NanoBoard 3000.

You are reporting an issue with the following selected text and/or image within the active document: