Specifying too many Decode Bits
For this example, let's assume the following devices are attached to a processor via an Interconnect component:
- Port
m0– port peripheral (GPIOA), with base address0xFF00_0000
- Port
m1– port peripheral (GPIOB), with base address0xFF70_0000
For simplicity, lets assume each peripheral is 1KB in size. The number of bits to decode in each case is set to 15.
Figure 1 shows the mapping of such devices in the processor's Peripheral I/O space.
Figure 1. Example devices mapped into Peripheral I/O space.
Looking at the top 15 bits of each device's base address, we have:
GPIOA – 000000000000000
GPIOB – 011100000000000
At first sight, these are both unique decode addresses. We are, however, only considering the base address of each device. Remember that each device is 1KB in size. Let's consider the top 15 bits of the upper limit of each device's memory allocation:
GPIOA (0xFF00_0400) – 000000000000010
GPIOB (0xFF70_0400) – 011100000000010
These addresses are outside of those selectable using the respective 15-bit decode addresses (generated from the base addresses). In fact, we can determine that the following address ranges for each device will not be selectable:
- For GPIOA – addresses in the range
0xFF00_0200to0xFF00_0400
- For GPIOB – addresses in the range
0xFF70_0200to0xFF70_0400
We know that using too few address decode bits can lead to devices not being selected at all. At the other end of the spectrum, using too many address decode bits restricts the size of each device. Remember that as you add an extra decode bit, the range in address space selectable using the device's decode address is reduced. Too many bits therefore results, as we have seen, in a selectable space that is too narrow to fit the 1KB devices.
The remedy in this example is simply to reduce the number of address bits. Looking at the top bits of the base addresses, unique decode addresses can be gained using 2 decode bits.
Specifying too few Decode Bits
Address Decode Bits Vs Base Address - a Juggling Act