Specifying too few Decode Bits

For this example, let's assume the following devices are attached to a processor via an Interconnect component:

• Port m0 – port peripheral (GPIOA), with base address 0xFF00_0000

• Port m1 – port peripheral (GPIOB), with base address 0xFF10_0000

• Port m2 – port peripheral (GPIOC), with base address 0xFF20_0000

For simplicity, lets assume each peripheral is 1KB in size. The number of bits to decode in each case is set to 2.

Figure 1 shows the mapping of such devices in the processor's Peripheral I/O space.

Figure 1. Example devices mapped into Peripheral I/O space.

Looking at the top 2 bits of each device's base address, we have:

GPIOA – 00

GPIOB – 00

GPIOC – 00

From this, we can see that upon synthesis, the decode address for each device would be the same, 00. We have clearly not used enough decode bits to provide unique decode addresses for each device. So just how many should we use? Let's look at the top nibble of each device's base address:

GPIOA – 0000

GPIOB – 0001

GPIOC – 0010

From this, we can see that using 3 decode bits would still not be enough as that would result in GPIOA and GPIOB both having decode addresses of 000. If we use 4 decode bits, we could guarantee uniqueness of decode addresses between devices.

Of course, we could leave the 2 decode bits and simply change the base addresses for the devices, to give them greater separation in the address space. So to gain unique decode addresses using top 2 bits only, addresses could be changed to:

GPIOA – 0xFF00_0000

GPIOB – 0xFF40_0000

GPIOC – 0xFF80_0000

Note: To avoid the possibility of devices never being decoded for communications, the Configure OpenBus Interconnect dialog allows you to define a decoding 'order of priority'. Use the (increase priority) and (decrease priority) buttons in the dialog to reorder the device entries. Highest decoding priority is given to a device at the top of the list.
 
Specifying too many Decode Bits
Address Decode Bits Vs Base Address - a Juggling Act