WB_IRRC - Block Diagram

Frozen Content

Figure 1 shows a high-level block diagram for the WB_IRRC component.


Figure 1. WB_IRRC block diagram.

The function of the WB_IRRC depends on the operational mode defined for the component. Although the block diagram in Figure 1 shows various encoder/decoder units, they cannot be utilized concurrently. Only one of the following operational modes can be enabled at any one time:

  • NEC Encoder/Decoder mode – giving the ability to simultaneously transmit and receive IR data encoded using the NEC IR transmission protocol. Looking at Figure 1, this involves use of both the NEC Encoder and NEC Decoder Units.
  • RC5 Decoder mode – giving the ability to receive IR data encoded using the Philips RC5 IR transmission protocol. Looking at Figure 1, this involves use of the RC5 Decoder Unit only.
  • RAW Interface mode – giving the ability to simultaneously transmit and receive IR data encoded using any IR transmission protocol other than NEC and Philips RC5. Looking at Figure 1, this involves use of both the RAW Encoder and RAW Decoder Units

For information on the internal registers for the WB_IRRC that can be accessed from the host processor, see Accessible Internal Registers.

You are reporting an issue with the following selected text and/or image within the active document: