Third Party Boards - Indirect Connection using a NanoBoard
If a NanoBoard is available, the third party development board can be indirectly connected to Altium Designer using one of the NanoBoard's User Board headers, as illustrated in Figure 1.
Note: The illustration in Figure 1 shows a Parallel Port connection from the NanoBoard to the PC. For the Desktop NanoBoard NB2DSK01, this connection can also be made using a USB port.
The User Board A and B connectors facilitate the connection of two development boards. Both headers give access to the Hard and Soft Devices JTAG chains – eight signals in total.
If you just want to connect the Hard Devices JTAG chain, simply connect from the designated JTAG header of the development board to the desired User Board header on the NanoBoard. Pin 10 of the User Board header must be connected to ground in order for the NanoBoard's Controller to detect that a board is connected to the header. The Controller will then reroute the Hard and Soft Devices JTAG chains via the header accordingly.
If you wish to also enable communications to Nexus-enabled devices within a design, the Soft Devices JTAG chain signals must be wired from the User Board header of the NanoBoard to four accessible FPGA I/O pins. If you do not intend to use the soft chain, pin 5 of the header should be connected to pin 6.
To only detect device(s) on the third party board, ensure that any daughter board currently plugged into the NanoBoard is removed. If a daughter board remains present it must be programmed with a design, otherwise the Soft Devices JTAG chain will not be routed correctly through the daughter board and on to the User Board header. As such, the chain will be broken and you will not see soft devices within the design running on your development board.
The voltage level present at each User Board header is 3.3V – the voltage already having been translated on-board from the board's 5V power supply. For the majority of FPGA devices, this voltage will be that expected by the device. In such cases connection of the JTAG channels is straightforward. If the voltage of the device on the development board is lower than 3.3V, further shifting-down of the voltage is required (see Voltage Shifting).