Voltage Shifting

When connecting a development board directly to the PC via the parallel port, using only a parallel cable, the voltage level of the JTAG signals from the port are at a level of 5V. This level exceeds the safe operating voltage level for signals connected to FPGA devices. The voltage level of the JTAG channel signals must therefore be shifted / translated into a smaller, safer level, prior to being delivered to the pins of the physical FPGA device.

For a third party development board, voltage shifting with respect to the Hard Devices JTAG chain signals is normally provided either on the board itself or in the connector of the dedicated parallel port cable. For a custom-made board, you will need to add the required voltage shifting circuitry yourself.

Similarly for Soft Devices JTAG chain signals, the majority of development boards will not have provision for such signals and therefore, when wiring up the signals yourself, they will still be at the voltage level defined by the parallel port interface – 5V. The voltage level will therefore need to be shifted down.

The required voltage shifting of the Soft Devices JTAG signals could be easily done by creating an additional interfacing board and adding the relevant voltage shifting circuitry to it. The 74LVC244A octal buffer/line driver with 5V tolerant I/O is particularly well suited to such a job.

For example, you could create your own additional interface board that takes the parallel port cable into a header, then routes the individual JTAG chain signals to individual headers for output to the development board. The Hard Devices JTAG chain signals will of course be wired directly between input and output headers. The Soft Devices JTAG chain signals will run through the required voltage shifting stage, prior to arriving at the output header. Figure 1 illustrates how such a board could be used to connect the development board to the PC

Figure 1. Example voltage shifting of Soft
Devices JTAG signals via a purpose-built
interface board.