Hooking the OpenBus System to the Top-Level Schematic

With the OpenBus System defined and configured, the system now needs to be interfaced with the top-level schematic in the FPGA design. This is handled through a sheet symbol placed on the schematic sheet.

The sheet entries required to populate the sheet symbol can be obtained through use of the sheet entries and ports synchronization feature. Access this feature through the Sheet Symbol Actions » Synchronize Sheet Entries and Ports command, available from the right-click context menu for the sheet symbol. The Synchronize Ports To Sheet Entries On System dialog will appear (Figure 1).

Figure 1. Use the synchronize sheet entries and ports feature to hook-up the OpenBus System.

All ports from the OpenBus System document will be initially listed as unmatched ports. The ports themselves actually come from three places:

• Ports automatically derived based on the external interfaces of the peripheral devices (I/O peripherals and memory controllers). These ports are summarized on the External connection summary tab of the OpenBus Signal Manager dialog.

• Ports derived from the clock and reset line net definitions on the Clocks and Resets tabs of the OpenBus Signal Manager dialog.

• Ports derived from exported interrupt line definitions on the Interrupts tab of the OpenBus Signal Manager dialog.

When using the dialog to add sheet entries to the sheet symbol, it is a good idea to select each bank of related ports in turn, rather than all ports at once. This will make placement of the sheet entries within the sheet symbol that much easier. Simply group select the required ports and click the Add Sheet Entries button beneath the list – the sheet entries will float on the cursor ready for placement (Figure 2).

Figure 2. Sheet entry placement.

Once sheet entries for all ports have been added, the sheet symbol will be fully synchronized with the underlying OpenBus System.

Note: You can of course use the Create Sheet Symbol From Sheet Or HDL command (accessed from the Design menu in the schematic) to generate the sheet symbol quickly and in a more automated way. However, if used after the OpenBus System is defined, all sheet entries will be placed at once with no control.

Mopping up - Interface Circuitry

The last stage required to fully hook the OpenBus System into the FPGA design is to wire-up the interface circuitry on the top-level schematic. This circuitry includes the wiring between devices in the OpenBus System and the physical pins of the FPGA device. Any additional logic devices will also reside on this top-sheet. Remember that the extents of the OpenBus System are the sheet entries of the sheet symbol on the top-level schematic. The representation of the physical pins of the FPGA device are the port components that are placed on the schematic. The job becomes a simple one – wire between the two.

Note: You may need to rearrange sheet entries for peripheral interfaces, in order to match the layout of the port components and thereby make the schematic wiring as neat and as readable as possible.

Figure 3 illustrates an example of this interface circuitry, wired up to the sheet symbol. Notice also that the required components for implementation of the Soft JTAG chain – the NEXUS_JTAG_CONNECTOR and NEXUS_JTAG_PORT – are also included on the sheet. Figure 4 shows the underlying OpenBus System for this design, which is referenced by the sheet symbol.

Figure 3. Wired interface circuitry.

Figure 4. Example underlying OpenBus System, referenced by the sheet symbol on the top-level schematic.