Configuring a 32-bit Processor
The architecture of a 32-bit processor can be configured after placement on the OpenBus System document, or schematic sheet, using the Configure (32-bit Processors) dialog, an example of which is shown in Figure 1. Access to this dialog depends on the document in which you are working:
- In the OpenBus System document – access the dialog by right-clicking over the component and choosing the command to configure the processor from the menu that appears. Alternatively, double-click on the component to access the dialog directly.
- In the Schematic document – simply right-click over the device and choose the command to configure the processor from the context menu that appears. Alternatively, click on the Configure button, available in the Component Properties dialog for the device.
The drop-down field at the top-right of the dialog enables you to choose the type of processor you want to work with. As the pinouts between the 32-bit processors are essentially the same, you can easily change the processor used in your design without having to extensively rewire the external interfaces.
As you select the processor type, the Configure (32-bit Processors) dialog will change accordingly to reflect the architectural options available. The symbol on the OpenBus System document (or schematic) will also change to reflect the type of processor and, from the schematic perspective, the configuration options chosen.
The following sections explore all possible options that can be presented in the dialog.
Internal Processor Memory
This region of the dialog allows you to define the size of the internal memory for the processor. This memory, also referred to as 'Low' or 'Boot' memory is implemented using true dual port FPGA Block RAM and will contain the boot part of a software application and the interrupt and exception handlers.
Speed-critical (or latency-sensitive) parts of an application should also be placed in this memory space.
The following memory sizes are available to choose from:
1KB (256 x 32-bit Words)
2KB (512 x 32-bit Words)
4KB (1K x 32-bit Words)
8KB (2K x 32-bit Words)
16KB (4K x 32-bit Words)
32KB (8K x 32-bit Words)
64KB (16K x 32-bit Words)
128KB (32K x 32-bit Words)
256KB (64K x 32-bit Words)
512KB (128K x 32-bit Words)
1MB (256K x 32-bit Words)
When the component is placed on a schematic sheet, your configuration choice will be reflected in the Current Configuration region of the processor's schematic symbol (Figure 2).
Multiply/Divide Unit (MDU)
This region of the dialog allows you to define whether the processor should incorporate an MDU or not. Either choose to include an MDU in the architecture by selecting the Hardware MDU
option, or leave the MDU out of the architecture by choosing No MDU Hardware
.
With no MDU included in the architecture, the multiply (MULT, MULTU) and divide (DIV, DIVU) hardware instructions will not be available and these instructions will be emulated in software by the C Compiler.
When the component is placed on a schematic sheet, your configuration choice will be reflected in the Current Configuration region of the processor's schematic symbol.
On-Chip Debug System
This region of the dialog allows you to add an On-Chip Debug System (OCDS) unit to the processor's architecture, allowing you to:
- Control the processor from its associated instrument panel, which can be added to the Instrument Rack – Soft Devices panel.
- Interrogate and modify memory and register values in real-time.
- Perform source-level debugging of the embedded software application running on the processor.
Simply ensure that the option is set to Include JTAG-Based On-Chip Debug System
.
By specifying No On-Chip Debug System
for the processor, the above capabilities will be removed, but the processor will naturally consume less FPGA resources.
Again, when the component is placed on a schematic sheet, your configuration choice will be reflected in the Current Configuration region of the processor's schematic symbol.
Breakpoints on Reset
This region of the dialog allows you to specify whether debugging of the processor from a Hard Reset is enabled or not. If you choose the option to Enable Breakpoints on Hard Reset
, then the processor will stop upon encountering a breakpoint immediately after an external reset is received on its RST_I input pin.
See Also
For further information with respect to real-time debugging of the processor, see Facilitating Real-Time Debugging of a Processor and Accessing the Embedded Debug Environment.