Using Configurations

Configurations and constraint files can be considered from two different perspectives.

Existing Board

In the case where the FPGA designer is working with an existing (constructed) PCB, the resources of the board and how they are connected to the FPGA are already defined. This would include Altium NanoBoards and third party development or evaluation boards. The board would come with a constraint file that describes its resources and how they are connected. In the case of boards with plug-in devices, the board would come with a number of constraint files, one for each plug-in device.

New Board being Developed

In this case, the design of the FPGA may be driving the design and layout of the PCB. Here the designer may let the FPGA tools allocate pins for the design and then use this information to drive the layout of the PCB. Alternatively, the PCB designer may allocate the pins on the FPGA and then pass this information to the FPGA designer.

In all of these cases, a constraint file holds the current assignments of these pins. This information is used to update either the PCB design or to drive the FPGA place and route tools. The information in this file can also be updated by importing from the FPGA tools, or importing from the PCB design after board-level optimization of pin assignments.

An Iterative Approach

These two perspectives should not be considered as mutually exclusive. With the first case of an existing constructed board, there will most likely (in the case of NanoBoards and other development boards) be general purpose I/O headers that can be used as required. In this case, the constraint file that comes with the board should be considered as a template for the engineer's own design. The constraint file could be extended to include the engineer's new connections through the general purpose I/O connectors on the board, or an extra constraint file could be created to hold this information.