Altium Lab

The Altium Labs are a collective testing area for future Altium Designer features that have not officially been released into the software. Think of a series of laboratories, each one concentrating on the development of a particular new feature, and you'll get the picture. These are features that have not been deemed ready for release. They are provided as a 'sneak preview' of what is coming on the horizon to Altium Designer.

So go on, have a play and remember – although these features are not officially ready for use, all feedback gained through user-experiences will help to make these great 'future features' even greater, come actual release time!

Accessing the Labs

The Altium Labs are accessed solely through Altium Designer ホームページ. Access the Home page using the View»Home command (shortcut: V, H), or by clicking the button on the Navigation toolbar.

A dedicated Altium Labs pane is provided, listing all of the features currently resident in the labs.

To 'activate' the functionality of an Altium Labs feature within your current installation of Altium Designer, simply enable the check box next to the feature's entry in the list. All commands, dialogs and controls associated with the feature will be made 'live' for you to use. To 'deactivate' a feature, just uncheck its check box.

Enter the developer's laboratory! With Altium Labs,
you can enable and test-drive as-yet-unreleased
Altium Designer features.

Activation and deactivation of features in the Altium Labs is only possible provided you are signed in to your Altium account, through the secure Altium Portal. Sign in controls are conveniently located in the My Account pane of the Home page.

Currently in the Labs

Future Altium Designer features currently available to test and explore in the Altium Labs are:

Extended C-to-Hardware Features

Related articles: Altium Designer の C-to-Hardware Compilation テクノロジーへの導入, Tutorial - Designing Custom FPGA Logic using C

FPGA designs can be created using a mixture of two techniques – using pre-existing components such as processors and other IP cores, and creating custom logic from scratch. Creating custom logic has the advantage that there is no limit to what can be done. The customer is pretty much only bounded by their imagination – and their tools.

Traditionally, custom logic is developed using hardware description languages (HDLs), such as VHDL or Verilog. This is a difficult and time consuming approach, especially for for the majority of board-level designers who do not already have skills or experience with these languages.

Currently, Altium Designer allows engineers to develop standalone custom logic using the C language. This is acheived through use of schematic-based C Code Symbol and C Code Entry design objects, and harnessing the power of Altium Designer's C-to-Hardware Compiler. The C language is much more abstract than any HDL and is also well known by most engineers.

This new Altium Labs feature builds upon this existing capability, extending the C-to-Hardware features to provide an enhanced, more powerful environment in which to develop your C-based custom FPGA logic.

Areas of this feature include:

  • Providing the ability for C code in FPGA code blocks to access generic IO ports.
  • Providing the ability for C code in FPGA code blocks to access external Wishbone devices and memories.
  • Providing the ability for C code in FPGA code blocks to call functions implemented outside the code block.
  • Providing control over the C-to-Hardware Compiler's scheduling, by using the wait intrinsic function. The wait function forces the compiler to schedule the statements following the function after the statements preceding the function. Also, an integer parameter can be provided to also schedule a minimum number of cycles to be waited between the two blocks of code.

With this Altium Labs feature enabled, you will notice the following additional tabs presented in the C Code Symbol dialog:

  • Ports tab
  • WishboneDevices tab
  • Imports tab

New tabs, additional functionality - courtesy of enabling this Altium Labs feature.

Use these tabs to enhance the abilities of your standalone, C-coded custom FPGA logic within your designs.

Two New Automatic (Route To Mouse) Modes for Interactive Routing

Related articles: PCB 配線, Interactive Routing, Interactively Routing a Net

This Altium Labs feature delivers the following two additional automatic path modes, when using the Interactive Router:

  • You can route to the current cursor location on the current layer.
  • You can route to the current cursor location across different layers – the appropriate via will be placed accordingly to drop to the layer where the cursor is positioned.

With this Altium Labs feature enabled, you will notice the following additional options added to the Routing Conflict Resolution region, on the PCB – Interactive Routing page of the Preferences dialog (DXP»Preferences):

  • AutoRoute On Current Layer
  • AutoRoute On Multiple Layers

New interactive routing options added by enabling this Altium Labs feature.

Enable an option to make use of the corresponding automatic path mode as required. Use the Shift+R keyboard shortcut to cycle to the required mode while interactively routing your board.
 

These two routing modes will attempt to provide a routed path, where possible, in accordance with applicable design rule constraints and other options specified for interactive routing, on the PCB Editor – Interactive Routing page of the Preferences dialog.

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