XC4VSX35-10FFG668C - Feature Summary
Figure 1. Xilinx Virtex-4 FPGA
(XC4VSX35-10FFG668C).
The XC4VSX35-10FFG668C device is a member of the Virtex-4 family of FPGAs. The Virtex-4 family is comprised of 17 devices in total, over three platform families – LX, SX and FX. The SX series, of which this device is a member, provide a high performance solution for logic applications.
The Virtex-4 family provides devices offering densities ranging from 12,312 to 200,448 Logic Cells. The XC4VSX35-10FFG668C offers 34,560 Logic Cells. Table 1 provides an information summary for this device.
In order to use the Virtex-4 device, you will need to install the relevant Vendor tools – Xilinx® ISE™ or Xilinx ISE WebPACK® from www.xilinx.com.
| Feature | Description |
|---|---|
Device Name | XC4VSX35-10FFG668C |
Vendor | Xilinx |
Family | Virtex-4 |
Package | 668-Ball Flip Chip Fine Pitch Ball Grid Array (FF668) |
Speed Grade | 10 (Lowest) |
Temperature Grade | Commercial |
Pin Count | 668 |
Total I/O Banks | 11 |
Maximum User I/O Pins | 448 |
Max. Differential I/O Pairs | 224 |
Max. High-Speed Differential I/O Pairs | 0 |
Xilinx Logic Cells | 34,560 |
CLB Array | 3,840 CLBs (96 rows by 40 columns). (1 CLB = 4 Slices, giving 15,360 Slices). |
Embedded (Block) RAM | 3456K bits (192 dual-port RAM blocks, each 18K bits) |
Distributed RAM | 240K bits |
Embedded Multipliers (18x18) | 192 (each 18x18 multiplier is part of an XtremeDSP™ slice, which also includes an accumulator and an adder/subtracter). |
Digital Clock Managers (DCM) | 8 |
Phase Matched Clock Dividers (PMCD) | 4 |
Global Clock Resources | 32 |
Configuration Memory Required | 14,476,608 bits |
On-Chip Termination Support | Yes |
Location on Board
The Virtex-4 device (designated U1) is located on the component side and in the lower half of the board.
Schematic Reference
The Virtex-4 device and related circuitry can be found on the following sheets of the daughter board schematics:
DEVICES.SchDoc(entitled FPGA, LEDs and SRAM Memory)
FPGA.SchDoc(entitled FPGA Connections)
FPGA_NonIO.SchDoc(entitled FPGA Power and Programming)
Bypass_FPGA_1V2.SchDoc(entitled FPGA Bypass Capacitors for 1V2)
Bypass_FPGA_2V5.SchDoc(entitled FPGA Bypass Capacitors for 2V5)
Bypass_FPGA_3V3.SchDoc(entitled FPGA Bypass Capacitors for 3V3).
Further Device Information
For more information on the XC4VSX35-10FFG668C device, refer to the datasheet (ds112.pdf) available at www.xilinx.com.