XC3S1400AN-4FGG676C - Supported Single-Ended IO Standards
The following table lists the single-ended I/O standards supported by the XC3S1400AN-4FGG676C device.
Table 1. Supported single-ended I/O standards.| I/O Standard | Description |
|---|---|
HSTL_I | High-Speed Transceiver Logic (1.5V) Class I |
HSTL_III | High-Speed Transceiver Logic (1.5V) Class III |
HSTL_I_18 | High-Speed Transceiver Logic (1.8V) Class I |
HSTL_II_18 | High-Speed Transceiver Logic (1.8V) Class II |
HSTL_III_18 | High-Speed Transceiver Logic (1.8V) Class III |
LVCMOS12 | Low-Voltage Complementary Metal-Oxide Semiconductor (1.2V) |
LVCMOS15 | Low-Voltage Complementary Metal-Oxide Semiconductor (1.5V) |
LVCMOS18 | Low-Voltage Complementary Metal-Oxide Semiconductor (1.8V) |
LVCMOS25 | Low-Voltage Complementary Metal-Oxide Semiconductor (2.5V) |
LVCMOS33 | Low-Voltage Complementary Metal-Oxide Semiconductor (3.3V) |
LVTTL | Low-Voltage Transistor-Transistor Logic (3.3V) |
PCI33_3 | Peripheral Component Interconnect (33MHz, 3.3V) |
PCI66_3 | Peripheral Component Interconnect (66MHz, 3.3V) |
SSTL18_I | Stub Series Terminated Logic (1.8V) Class I |
SSTL18_II | Stub Series Terminated Logic (1.8V) Class II |
SSTL2_I | Stub Series Terminated Logic (2.5V) Class I |
SSTL2_II | Stub Series Terminated Logic (2.5V) Class II |
SSTL3_I | Stub Series Terminated Logic (3.3V) Class I |
SSTL3_II | Stub Series Terminated Logic (3.3V) Class II |
Notes
LVCMOS and LVTTL IO standards can have different drive strengths. For more information, refer to the Spartan-3 Generation FPGA User Guide (ug331.pdf), available at www.xilinx.com.