Updating the Firmware on the Desktop NanoBoard NB2DSK01

The Desktop NanoBoard NB2DSK01 uses a Xilinx Spartan-3 device (XC3S1500-4FG676C) as the controller for the board. Referred to as the NB2DSK01 - NanoTalk Controller, this device (designated U5) communicates with the host PC using Altium's NanoTalk communications protocol.

It is the NanoTalk Controller into which the intelligence for the system – the NanoBoard firmware – is programmed. This upgradeable firmware is stored in a Xilinx Platform Flash NB2DSK01 - Configuration PROM device (XCF08PFS48C), designated U7 on the board. On power-up, the firmware is automatically loaded from the Configuration PROM into the NanoTalk Controller.
 

 
The NB2DSK01 is shipped with the firmware already pre-installed, but future revisions can be installed at any time using a dedicated 'SYSTEM JTAG' port on the NB2DSK01 motherboard. This port provides Altium Designer with Hard JTAG access only to the NanoTalk Controller and the associated configuration PROM. All other resources are invisible to the software. The configuration PROM can then be reprogrammed with the new firmware.

The following sections detail the procedure for updating the firmware.

Pre-update Preparation

Before the new version of firmware can be downloaded to the Configuration PROM, the Desktop NanoBoard NB2DSK01 must first be prepared as follows:

1. Turn off the NB2DSK01.
    

2. Connect from the PC to the 'SYSTEM JTAG' header on the NB2DSK01 (at the left-hand edge of the board). This is a fixed function header which, when used, switches control of the NB2DSK01 from the NanoTalk Controller to a simple hardware chain, which involves the NanoTalk Controller and the Configuration PROM.
    
   Connection to the 'SYSTEM JTAG' header involves the use of Altium's USB JTAG Adapter, to convert from USB cabling (from the PC) to 10-way IDC JTAG cabling (connected to the NanoBoard).
    

   If you have an older, Altium Universal JTAG Interface, use this to connect from the parallel port on your PC to the 'SYSTEM JTAG' header. Note that the selector switch on the Universal JTAG Interface is used only when programming a JTAG device from Altera Quartus II or Xilinx ISE tools directly, and via their associated parallel cabling. The switch position has no relevance when programming the Configuration PROM from Altium Designer.

3. Power-up the NB2DSK01.

Downloading the New Firmware

Within Altium Designer, open the Devices view (View » Devices Views), if not already open. Ensure that the Live option is enabled as this activates the auto-board-recognition system.

With the connection to the 'SYSTEM JTAG' header in place, the Configuration PROM device will appear in the Hard Devices chain, as shown in Figure 1.

The configuration for the device is stored in a PROM file, using the Intel MCS-86 format. This is an ASCII hex file with extension .mcs.

To download the new configuration:

1. Right-click on the icon for the Configuration PROM in the Hard Devices chain of the Devices view and select Choose File and Download from the pop-up menu.
    
2. The Choose Programming File For Xilinx XCF XCF08PFS48C dialog appears. Use this dialog to navigate to the required programming file (.mcs) and click *Open. By default, this file is located in the \System folder of the installation.

The download will proceed, with progress shown in Altium Designer's Status bar. The process actually consists of device erasure, device programming, and then verification of programming. At the end of the cycle, an information dialog will appear with the result of the download. Successful programming is reflected in the text beneath the device's icon changing to Programmed.

If any errors occur during the download, a warning dialog will appear. If this happens, power-down the NB2DSK01 for a few seconds and then run the download process again.
 

Downloading Program Code

The .mcs file downloaded to the Configuration PROM contains the FPGA design destined to reside on the NB2DSK01 motherboard's Spartan-3 FPGA device (the NanoTalk Controller). Within that design is a TSK3000A processor, the embedded code for which also needs to be downloaded as part of the overall process of updating the firmware on the NanoBoard.

The .mcs file contains the portion of embedded code that is to reside in Block RAM within the NanoTalk Controller. The remainder of the embedded code must be saved into the common-bus Flash memory resident on the motherboard. To do this, perform the following:

1. Cycle the power for the NB2DSK01. The TFT LCD panel will show the current version of firmware loaded into the Configuration PROM. As the embedded code in the Flash memory will not be the same version the message Program code is not present in flash or is out of date will be displayed. In addition, the text underneath the icon for the Configuration PROM will change to Read Protected.
    
2. From the Devices view, access the Program NB2 Firmware command from the main Tools menu.
    
3. From the subsequent Choose NB2 firmware hex file dialog that appears, locate the required embedded object file (.hex) and click *Save. By default, this file is also located in the \System folder of the installation and will typically have the same name as the .mcs file.
    
4. After a short delay, text will appear on the TFT LCD panel, showing first that the Flash memory is being erased, and then that the embedded code is being downloaded. Once the download has finished, the total number of bytes downloaded will be displayed.
    
5. Press any of the NB2DSK01's generic user switches, located below the TFT LCD panel. The firmware will be rebooted and the embedded code stored in the Flash memory will be loaded into SRAM on the motherboard.

Testing the NB2DSK01

Once the Configuration PROM device has been successfully programmed and the corresponding Hex file has been loaded into the Flash memory, the new firmware can be tested as follows:

1. Power-down the NB2DSK01.
    
2. Remove the cable from the 'SYSTEM JTAG' header.
    
3. Re-connect the NB2DSK01 to the PC, using either the parallel port or the USB port.
    
4. Power-up the NB2DSK01.
    
5. Ensure that the Live option (in the Devices view) is enabled, to activate the auto-board-recognition system.
    

6. In the Devices view, press F5 (Refresh). This forces a scan of the hardware to detect which devices are currently connected. The NanoTalk Controller for the connected NB2DSK01 should automatically be detected and an icon for the board appear in the NanoBoard chain (the top chain in the Devices view).
    
   The FPGA device on the daughter board should be automatically detected and appear in the Hard Devices chain (the middle chain in the Devices view).
    
   Figure 2 illustrates detection of an NB2DSK01 which has a Xilinx Spartan-3 daughter board (DB30) attached.
    
   

   Figure 2. Successful detection of Desktop NanoBoard NB2DSK01 and target FPGA device.

   
    

7. Open an FPGA project that includes one or more Nexus-enabled devices (e.g. processors, counters, logic analyzers) and that is appropriately configured to target the FPGA device on the DB30 daughter board. Go ahead and program the FPGA on the daughter board. This will test that the Soft Devices JTAG chain is functioning correctly (presented as the bottom chain in the Devices view, once the design is downloaded into the target physical device).
    
   

   Figure 3. Successful communications with a Nexus-enabled device in the Soft Devices JTAG chain.

   
    

8. With the chosen design running in the FPGA, double-click on the icon for the NB2DSK01 (in the NanoBoard chain of the Devices view). The Instrument Rack – NanoBoard Controllers panel will appear. Use the instrument panel to change the system clock frequency. This will write the new clock frequency to the system clock, which, being an SPI device, will test that communication to SPI devices is working correctly.
    
   

   Figure 4. Reprogramming the SPI-based programmable system clock.

   
    
   As well as writing the new frequency to the clock, the value will also be stored in the common-bus Flash memory and read back by the NanoTalk Controller to verify the change. As the new frequency is stored in the Flash memory, it is persistent across both design sessions and hardware sessions. Therefore, closing Altium Designer, relaunching and opening an FPGA project (or cycling the NB2DSK01's power) will result in the last clock frequency entered being used.

See Also