LFE2-35SE-5FN672C - Feature Summary
Figure 1. LatticeECP2 FPGA (LFE2-35SE-5FN672C).
The LFE2-35SE-5FN672C device is a member of the 1.2V ECP2 family of FPGAs. The ECP2 provides a low-cost, high-density solution for applications such as those targeted to the consumer electronics industry.
The entire ECP2 family includes six devices offering densities ranging from 6K to 68K LUTs. The LFE2-35SE-5FN672C offers 32K LUTs. Table 1 provides an information summary for this device.
In order to use the ECP2 device, you will need to install the relevant Vendor tools – Lattice® ispLever® from www.latticesemi.com. The ispLever Starter software can be downloaded but does require a license. Check the website for licensing options.
| Feature | Description |
|---|---|
Device Name | LFE2-35SE-5FN672C |
Vendor | Lattice |
Family | ECP2 |
Package | 672-Ball Fine Pitch Ball Grid Array (fpBGA672) - Lead Free |
Speed Grade | 5 |
Temperature Grade | Commercial |
Pin Count | 672 |
Maximum User I/O Pins | 450 |
Max. Differential I/O Pairs | 224 |
LUTs | 32K |
Embedded (Block) RAM | 332K bits (over 18 blocks) |
Distributed RAM | 64K bits |
DSP Blocks | 8 |
Embedded Multipliers | 64 (9x9); 32 (18x18); 8 (36x36) |
Clock Managers (PLLs/DLLs) | 4 (2 of each) |
Global Clock Resources | 16 |
Configuration Memory Required | 6,920,602 bits |
On-Chip Termination Support | No |
Further Device Information
For more information on the LFE2-35SE-5FN672C device, refer to the LatticeECP2/M Family Handbook (HB1003.pdf) available at www.latticesemi.com.