XC3SD1800A-4FGG676C - Feature Summary

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Figure 1. Xilinx Spartan-3A DSP FPGA
(XC3SD1800A-4FGG676C).

The XC3SD1800A-4FGG676C device is a member of the Spartan-3A DSP family of FPGAs. The Spartan-3A DSP provides a low-cost, high-performance DSP solution for high-volume, cost-critical applications.

The entire Spartan-3A DSP family includes two devices offering 1,800,000 and 3,400,000 gates. The XC3SD1800A-4FGG676C offers 1.8 million gates. Table 1 provides an information summary for this device.
 

In order to use the Spartan-3A DSP device, you will need to install the relevant Vendor tools – Xilinx® ISE™ or Xilinx ISE WebPACK® from www.xilinx.com.


Table 1. Feature summary for the Spartan-3A DSP FPGA device.
Feature
Description

Device Name

XC3SD1800A-4FGG676C

Vendor

Xilinx

Family

Spartan-3A DSP

Package

676-Ball Fine Pitch Ball Grid Array (FG676)

Speed Grade

Standard

Temperature Grade

Commercial

Pin Count

676

Maximum User I/O Pins

519 (includes a maximum of 110 Input-only pins)

Max. Differential I/O Pairs

227

System Gates

1,800,000

Xilinx Logic Cells

37,440

CLB Array

4,160 CLBs (88 rows by 48 columns). (1 CLB = 4 Slices, giving 16,640 Slices).

Embedded (Block) RAM

1512K bits

Distributed RAM

260K bits

Embedded Multipliers (18x18)

84 (each 18x18 multiplier is part of an XtremeDSP™ DSP48A slice, which also includes an 18-bit pre-adder, 48-bit post-adder/accumulator and cascade capabilities)

Digital Clock Managers (DCM)

8

Global Clock Resources

16

Configuration Memory Required

8,197,280 bits

On-Chip Termination Support

Yes

Location on Board

The Spartan-3A DSP device (designated U4) is located on the component side and in the lower half of the board.

Schematic Reference

The Spartan-3A DSP device and related circuitry can be found on the following sheets of the daughter board schematics:

  • DEVICES.SchDoc (entitled FPGA, LEDs and SRAM Memory)
  • FPGA.SchDoc (entitled FPGA Connections)
  • FPGA_NonIO.SchDoc (entitled FPGA Power and Programming)
  • Bypass_FPGA_1V2.SchDoc (entitled FPGA Bypass 1V2)
  • Bypass_FPGA_2V5.SchDoc (entitled FPGA Bypass 2V5)
  • Bypass_FPGA_3V3.SchDoc (entitled FPGA Bypass 3V3).

Further Device Information

For more information on the XC3SD1800A-4FGG676C device, refer to the datasheet (ds610.pdf) and associated user guide (ug331.pdf) available at www.xilinx.com.

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