NanoBoard 3000 - SPDIF Interface

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The NanoBoard 3000 caters for transmission and reception of digital audio signals in accordance with the S/PDIF (Sony/Philips Digital Interconnect Format) protocol. Signal I/O is handled through two RCA headers.

S/PDIF input and output ports.

S/PDIF Output

The S/PDIF output circuit is a straightforward implementation. The signal line from the connected I/O pin of the User FPGA is first passed through two (unbuffered) hex inverters (74HCU04, from Fairchild Semiconductor). The output is then passed through a simple voltage divider, the specified resistances of which give a multiplier of 0.31. This lowers the signal voltage level to around the 1V peak-to-peak expected by the 75Ω coaxial cable through which the S/PDIF signal will be transmitted.

Galvanic isolation is provided courtesy of a 1:1 digital audio transformer (a PT4812, from PPT China), offering transmission rates of 1-7Mbps and a minimum isolation voltage of 500Vrms. The secondary side of the transformer is connected to the RCA header labeled 'SPDIF OUT' on the board.

S/PDIF Input

The RCA header labeled 'SPDIF IN', receives the external digital audio signal from a connected 75Ω coaxial cable. The input signal – from pin 2 of the header – is terminated through a 75Ω resistor.

A subsequent 0.1uF capacitor decouples the signal and removes (filters) unwanted DC components.

The signal is then passed through two (unbuffered) hex invertors (again, 74HCU04s). The first of these has appropriate resistors in-place to create a standard linear amplifier – effecting a simple fixed gain of 16.5. This brings the signal level up from the 250-500mV peak-to-peak arriving at the board, to around the level expected by the I/O pin of the User FPGA, to which the signal is subsequently wired.

200mA/30V Schottky diodes are used to provide protective diode clamps on the input signal line (after the filtering stage), to both 3.3V and GND. This ensures suppression of unwanted voltage transients (induced by ESD for example).

Location on Board

The two RCA headers – labeled 'SPDIF OUT' (designated J11) and 'SPDIF IN' (designated J12) – are located along the bottom edge on the solder side of the board. Looking from the front, they can be found to the right of the PS/2 Mouse and Keyboard ports.

S/PDIF I/O ports (as seen from the front of the board).

The digital audio transformer (designated T1), the unbuffered hex inverter (designated U3) and the protection diodes (designated D1 and D2) are also located on the solder side of the board, above the RCA headers themselves.

S/PDIF interface circuitry.

Schematic Reference

The S/PDIF circuitry can be found on Sheet 47 (CON_SPDIF_INOUT_A.SchDoc, entitled S/PDIF RCA IN/OUT) of the motherboard schematics.

Design Interface Component

Table 1 summarizes the available design interface component that can be placed from the FPGA NB3000 Port-Plugin.IntLib, to access and use the S/PDIF interface.

Table 1. S/PDIF port-plugin component.
Component Symbol
Component Name


Place this component to access and use the S/PDIF interface.

Further Device Information

For more information on the PT4812 device, refer to the datasheet (cn_r_3_183[1].pdf) available at

For more information on the 74HCU04 device, refer to the datasheet (MM74HCU04.pdf) available at

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