NB2DSK01 - Generic User Switches

Frozen Content

The NB2DSK01 provides a further five push button style switches that are wired to separate I/O pins of both the NanoTalk Controller (Xilinx Spartan-3 FPGA) and the daughter board FPGA. From the NanoTalk Controller's perspective, these switches are used for navigation/control of the GUI on the TFT LCD panel. From a daughter board FPGA perspective, they can be used as generic switch inputs to a design.

Figure 1. PDA-style push buttons.

Each switch is of type DPNO – Double Pole Normally Open. In the open position, it provides a logical High signal to the destination FPGA device, changing to logical Low when pressed.

Location on the Board

The switches (designated SW1 - SW5) are located on the component side of the board, below the area populated by the TFT LCD panel.

The five switch signals arrive at the daughter board FPGA as signals SW0 to SW4. On the NB2DSK01, SW0 is the signal associated with switch number 1, in the left-most position.

Schematic Reference

The switches can be found on Sheet 58 (SW_PDA_DPNOx5.SchDoc, entitled PDA-Style 5 x DPNO Switch) of the motherboard schematics.

Design Interface Component

Table 1 summarizes the available design interface components that can be placed from the FPGA NB2DSK01 Port-Plugin.IntLib, to access and use the push button switches, SW1 - SW5.

Table 1. User switches port-plugin components.

 

Component Symbol

 

 

Component Name

 

 

Description

 

USER_BUTTONS

Place this component to use all five push button switches (SW1 - SW5) in your FPGA design.

USER_BUTTON0

Place this component to use push button switch SW1 in your FPGA design.

USER_BUTTON1

Place this component to use push button switch SW2 in your FPGA design.

USER_BUTTON2

Place this component to use push button switch SW3 in your FPGA design.

USER_BUTTON3

Place this component to use push button switch SW4 in your FPGA design.

USER_BUTTON4

Place this component to use push button switch SW5 in your FPGA design.

Although the five signals arrive at the daughter board FPGA device on separate pins, the USER_BUTTONS interface component provides a 5-bit bus input. Connection to the component's bus port depends on where in the design these signals are destined. If, for example, you wanted to use single switch signals in different areas of the design, you would need to use an appropriate bus joiner device.

Remember that each switch provides a Low signal when pressed. If you require a signal that goes High when the corresponding switch is pressed, you will need to place an inverter component within your design accordingly.

For more information on the available bus joiner and inverter components available for use in an FPGA design, see the Functional Classes - Bus Joiner and Functional Classes - Inverter sections of the FPGA Generic Library Guide, respectively.

 

 

 

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