NB2DSK01 - ADC-DAC-I2C

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Modified by Admin on Sep 13, 2017

The NB2DSK01 is equipped with general purpose analog-to-digital and digital-to-analog converters, both interfaced to the daughter board FPGA using the I2C bus protocol.

Figure 1. ADC/DAC and I2C interface.

Analog-to-digital conversion is provided by a 4-channel, 8-bit MAX1037EKA-T ADC device (from Maxim). Digital-to-analog conversion is provided by a 4-channel, 10-bit MAX5841MEUB DAC device (also from Maxim). Both devices are powered from an analog 3.3V power supply and provide a 400kHz I2C-compatible 2-wire serial interface.

External analog signals destined for the daughter board FPGA are delivered to the NB2DSK01 through a 10-way screw terminal block. This terminal block also provides the four converted analog output signals, as well as the filtered 3.3V analog supply (VCCA) and analog ground (ADC_GND). These signals are summarized in Figure 2.

Figure 2. ADC/DAC-related screw terminal header.

The fourth analog input pin to the MAX1037 device has dual functionality. This pin can be programmed either to receive a fourth analog channel input (AIN3) or to output a reference voltage (REF) of 2.048V.

These same analog signals are also made available from a 14-pin extension header. In addition, this header provides the I2C interface signals, SDA and SCL, as well as the NB2DSK01's 5V power supply and power ground.

Table 1 summarizes the addresses that must be used to write and read the ADC and DAC devices (I2C slaves) over the I2C bus. Each address is made up of a 7-bit actual address (A6..A0) for the device and an additional bit (LSB) to distinguish whether the I2C master (an I2C Controller within the FPGA design) is writing to ('0'), or reading from ('1') that device.

Table 1. ADC/DAC addressing.

Device	I2C Write Address	I2C Read Address
MAX1037 ADC	C8h (11001000)	C9h (11001001)
MAX5841 DAC	BAh (10111010)	BBh (10111011)

For the MAX1037 device, the actual 7-bit address is factory programmed to always be 1100100. For the MAX5841 device, bits A6..A1 are factory programmed to always be 101110. Bit A0 is determined by an additional input – ADD. This input has been tied to VCCA, thereby giving a logical '1' for this bit.

The four analog input channels of the MAX1037 ADC (and similarly the 4 digital input channels of the MAX5841 DAC) are multiplexed – selectable by application software via the I2C connection. Refer to the respective datasheets for the devices for details of the Configuration/Setup byte (MAX1037) and Command byte (MAX5841) definitions.

Digital-to-analog conversion in the MAX5841 device is achieved using 10-bit resistor string DACs. The input supply reference to the device, used for each channel's DAC, is user-selectable via a configurable jumper header – designated JP1. Table 2 summarizes the effect of jumper placement on this header.

Table 2. JP1 header jumper placement.

Jumper Position	Description
1-2	Put a jumper on these pins to provide a precision 2.048V supply voltage as the input to the MAX5841 device's `REF` input. This voltage is sourced from the MAX1037 device's `AIN3/REF` pin. The reference voltage and state of this pin is configured using the select bits `S2..S0` of the Setup byte – written when configuring the ADC. To configure this pin as a reference output (outputting the device's internal reference voltage), these bits must be set to `11X` respectively.
3-4	Put a jumper on these pins to provide the analog 3.3V supply voltage as the input to the MAX5841 device's `REF` input.

Jumper Position

Description

1-2

Put a jumper on these pins to provide a precision 2.048V supply voltage as the input to the MAX5841 device's REF input. This voltage is sourced from the MAX1037 device's AIN3/REF pin. The reference voltage and state of this pin is configured using the select bits S2..S0 of the Setup byte – written when configuring the ADC. To configure this pin as a reference output (outputting the device's internal reference voltage), these bits must be set to 11X respectively.

3-4

Put a jumper on these pins to provide the analog 3.3V supply voltage as the input to the MAX5841 device's REF input.

Location on Board

The MAX5841 device (designated U4) and the MAX1037 device (designated U1) are both located on the solder side of the board.

Figure 3. MAX5841 (U4) and MAX1037 (U1) devices.

The screw terminal block (designated TS1), the I2C/Analog extension header (designated HDR7) and the voltage reference configurable jumper header (JP1), are all located on the component side of the board – to the left of the User LEDs.

Schematic Reference

The ADC/DAC circuitry can be found on the following sheets of the motherboard schematics:

Sheet 60 (DAC+ADC_MAX5841+MAX1037.SchDoc, entitled 4-Ch I2C 10-Bit DAC & 8-Bit ADC)

Sheet 61 (ADC_MAX1037.SchDoc, entitled MAX1037 ADC)

Sheet 62 (DAC_MAX5841.SchDoc, entitled MAX5841 DAC)

Sheet 63 (CON_ADCDAC_SCRSTR10F.SchDoc, entitled ADC/DAC Screw Header)

Sheet 64 (CON_ADCDAC_HDR14M.SchDoc, entitled ADC/DAC Header).

Design Interface Component

Table 3 summarizes the available design interface component that can be placed from the FPGA NB2DSK01 Port-Plugin.IntLib, to access and use the on-board ADC and DAC devices over an I2C bus.

Table 3. ADC/DAC port-plugin component.

Component Symbol	Component Name	Description
	`ADCDAC_I2C`	Place this component to interface to the MAX5841 and MAX1037 devices.

If your design involves communications with multiple I2C-compatible devices, you will need to place the generic I2C_BUS device. For more information, see Using Multiple SPI and I2C Devices in a Design.

Further Device Information

For more information on the MAX5841 and MAX1037 devices, refer to the datasheets (MAX5841.pdf and MAX1036-MAX1039M.pdf respectively) available at www.maxim-ic.com.