LFE2-35SE-5FN672C - Supported Single-Ended IO Standards

Frozen Content

The following table lists the single-ended I/O standards supported by the LFE2-35SE-5FN672C device.

Table 1. Supported single-ended I/O standards.
I/O Standard
Description

HSTL15 Class I

High-Speed Transceiver Logic (1.5V) Class I

HSTL18 Class I

High-Speed Transceiver Logic (1.8V) Class I

HSTL18 Class II

High-Speed Transceiver Logic (1.8V) Class II

LVTTL

Low-Voltage Transistor-Transistor Logic (3.3V)

LVCMOS12

Low-Voltage Complementary Metal-Oxide Semiconductor (1.2V)

LVCMOS15

Low-Voltage Complementary Metal-Oxide Semiconductor (1.5V)

LVCMOS18

Low-Voltage Complementary Metal-Oxide Semiconductor (1.8V)

LVCMOS25

Low-Voltage Complementary Metal-Oxide Semiconductor (2.5V)

LVCMOS33

Low-Voltage Complementary Metal-Oxide Semiconductor (3.3V)

PCI33

Peripheral Component Interconnect (33MHz, 3.3V)

SSTL18 Class I

Stub Series Terminated Logic (1.8V) Class I

SSTL18 Class II

Stub Series Terminated Logic (1.8V) Class II

SSTL2 Class I

Stub Series Terminated Logic (2.5V) Class I

SSTL2 Class II

Stub Series Terminated Logic (2.5V) Class II

SSTL3 Class I

Stub Series Terminated Logic (3.3V) Class I

SSTL3 Class II

Stub Series Terminated Logic (3.3V) Class II

For detailed information, refer to the LatticeECP2/M Family Handbook (HB1003.pdf) available at www.latticesemi.com.

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