Key Features of the NanoBoard 3000

Parent article: NanoBoard 3000

Altium's NanoBoard 3000 has the following features:

• Host (NanoTalk) Controller FPGA:
  • NanoBoard 3000XN – Xilinx variant: A Xilinx Spartan-3AN device (XC3S400AN-4FGG400C)
  • NanoBoard 3000AL – Altera variant: An Altera Cyclone III device (EP3C10F256C8N)
  • NanoBoard 3000LC – Lattice variant: A LatticeECP2 device (LFE2-12E-5FN256C)
• User FPGA:
  • NanoBoard 3000XN – Xilinx variant: A Xilinx Spartan-3AN device (XC3S1400AN-4FGG676C)
  • NanoBoard 3000AL – Altera variant: An Altera Cyclone III device (EP3C40F780C8N)
  • NanoBoard 3000LC – Lattice variant: A LatticeECP2 device (LFE2-35SE-5FN672C)
• One 100-way peripheral board connector ('NANOCONNECT' interface)
• 5V DC power connector with power switch
• Altium NanoTalk USB 2.0 PC interface
• 4x Serial SPI Flash memory devices:
  • One containing Primary boot image for the Host Controller
  • One containing Golden boot image for Host Controller
  • Two for use by User FPGA (for boot/embedded usage)
• Dedicated System JTAG programming port
• 1-Wire® memory device used to store board ID and related information
• Programmable clock 6 to 200 MHz, accessible by Altium Designer or by a User FPGA design
• Fixed 20MHz reference clock
• SPI Real-Time Clock with 3V battery backup
• Adjustable voltage regulators set to generate 1.2V, 1.8V, 2.5V and 3.3V power
• Power supply test points for all supply levels available on the board, including GND points
• On-board memories accessible by User FPGA:
  • 256K x 32-bit common-bus SRAM (1MByte)
  • 16M x 32-bit common-bus SDRAM (64MByte)
  • 8M x 16-bit common-bus 3.0V Page Mode Flash memory (16MByte)
  • Dual 256K x 16-bit independent SRAM (512KByte each)
• On-board memory accessible by Host Controller FPGA:
  • 256K x 16-bit independent SRAM (512KByte)
• LED array, 8 RGB LEDS
• 5 generic push-button switches
• 4-channel 8-bit ADC, SPI-compatible
• 4-channel 8-bit DAC, SPI-compatible
• 4x isolated IM Relay channels
• 4x PWM power drivers
• Screw terminal headers for ADC/DAC/Relay/PWM interfaces
• S/PDIF interface
• SD (Secure Digital) card readers:
  • One for use by the Host Controller FPGA
  • One for use by the User FPGA
• Dual 18-way (20 pin) I/O expansion headers with power supply selection links
• User prototyping area
• SVGA interface (24-bit, 80MHz)
• 10/100 Fast Ethernet interface
• USB 2.0 High-Speed interface
• RS-232 Serial Port – DB9M
• RS-485 Serial Port – 'RJ45'
• PS/2 Mini-DIN Mouse Port
• PS/2 Mini-DIN PC Keyboard Port
• 240 x 320 TFT LCD with touch screen
  • 37-pin TFT connector
  • Resides on separate satellite PCB, attached to motherboard through a 1.8" ATA/IDE connector
  • 12-bit SPI touch screen controller
• 8-way DIP-switch
• USB hub:
  • 3x USB A-type connectors
  • ISP1760 Hi-speed USB Host Controller
• Stereo 2W audio power amplifier with 3.5mm test input jack and DC volume control
• 24-bit Stereo Audio CODEC with I2S-compatible interface
  • Analog audio input: Stereo line in
  • Analog audio output: Stereo line out
  • Digital audio data: Transfer over I2S bus
• Audio mixer (L and R) for combining audio sources:
  • Line Out from Host Controller (Delta-Sigma DAC output, driven by FPGA)
  • Line Out signal wired from peripheral board socket
  • Line Out signal wired from audio CODEC
  • Buzzer output from User FPGA design
• Stereo audio jacks (3.5mm):
  • Line In / Line Out
  • Headphones
• Speaker sockets for direct connection of speakers, resident on a separate (attached) board
• Status LEDs:
  • For Host Controller status
  • For User FPGA power and program status
• Diagnostics interface – PCI Express (PCIe) edge connector for connection of automated test equipment (ATE)
• 1.8" ATA/IDE connector providing access to user LED and generic switch I/O
• Test/Reset button