Downloading a Test Project to the Desktop NanoBoard NB2DSK01

Frozen Content

To ensure that Altium Designer and the Desktop NanoBoard NB2DSK01 are installed and functioning correctly, follow the steps below to compile and synthesize an example project, from within Altium Designer, and download it to the FPGA resident on the currently plugged-in daughter board. For this test we will use the Mandelbrot.PrjFpg example project, found in the \Examples\Soft Designs\Showcases\Mandelbrot folder of the installation.

  1. From within Altium Designer, select File » Open Project.
  2. Navigate to the \Examples\Soft Designs\Showcases\Mandelbrot directory and open the file Mandelbrot.PrjFpg. When the project has loaded, the Projects panel on the left side of the workspace will display the files in this project.
  3. If the Devices view is not active, select View » Devices Views from the menus and choose the required view that you wish to use. The open project will automatically be assigned to the FPGA device on the daughter board plug-in. Figure 1 illustrates this for an installed Xilinx Spartan-3 daughter board (DB30).

    Figure 1. Loading an example project - automatically targeted to the daughter board FPGA device.

    This assignment takes place because a valid configuration exists for the project, containing a constraint file that targets the daughter board device, as illustrated by a valid project/configuration entry in the field below the icon for the physical device. If a compatible configuration did not exist, you would need to run the auto-configuration feature to quickly create one.

  4. The four stages displayed above the physical device are its Process Flow. To process the project and download it to the daughter board FPGA device, click the Program FPGA button – the final stage in this flow.

    Figure 2. Starting the programming process.

    The system will sequentially invoke each stage of the Process Flow. This involves:
    ~  compiling the source project files
    ~  synthesizing the design
    ~  calling the vendor place and route tools to process the design for the target FPGA, and
    ~  downloadingthe design to the daughter board FPGA.
    This process can take several minutes depending on the speed of your computer and which daughter board is installed.

    Figure 3. Reaching the Place and Route stage of the overall Build process.

    Note: If the system fails during the Build processes, shown by a magenta status indicator, this can be because the FPGA vendor toolsare not correctly installed or have not been properly activated. Please refer to the information supplied with the FPGA vendor tools for information on installing and activating these tools.

Once the design has been downloaded all of the stage indicators in the Process Flow will be green, the text underneath the physical device's icon will change from Reset to Programmed, and the Results Summary dialog will be shown (Figure 4). On the software side, this indicates that the project has been successfully processed and downloaded to the daughter board FPGA. Close this dialog.

Figure 4. Physical device successfully programmed with the FPGA design.

On the hardware side, the 'Program' LED on the daughter board will be lit (Green), confirming that the design has been loaded into the physical device. For this example project, additional confirmation of successful programming comes in the form of a Mandelbrot pattern displayed on the TFT LCD panel.

Use the supplied stylus to draw a frame around part of the pattern you wish to 'zoom into'. Press the 'DAUGHTER BD TEST/RESET' button at the bottom of the NB2DSK01 motherboard, to the left of 'User Header A', to restore the display to its original (full) size.

Also notice that the lower chain in the Devices view – the Soft Devices chain – becomes populated with any soft (Nexus-enabled) devices detected in the design. This example project contains a single 32-bit processor (a TSK3000A). The icon representing the processor is shown as 'Running'. This reflects that the system is communicating with this processor, allowing you to interact and control the processor for development and debugging purposes. Double-clicking on the icon for any soft (Nexus-enabled) device in this chain (processors, virtual instruments) will give access to the front panel for that device.

Figure 5. Example of accessing the controls for a soft JTAG device (TSK3000A processor).

See Also

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