Accessing Peripheral Board Resources

Frozen Content

Resources on the plug-in peripheral boards are made available to the physical FPGA device on the currently attached daughter board. The corresponding I/O pins from each peripheral board connector – 50 each – are wired directly to pins of the daughter board connectors:

  • Peripheral Board A and B connector signals are wired to daughter board connector HDR_L1
  • Peripheral Board C connector signals are wired to daughter board connector HDR_T1

These signals are subsequently wired to I/O pins of the daughter board's FPGA device. By keeping the signals generic – based on the peripheral board connector position and not on the resources – the peripheral boards can be attached to the NB2DSK01 in any of the three peripheral board positions.

For more information on peripheral boards, see Peripheral Boards.

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