WB_SDCARD - Operational Overview

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The following steps outline the basic procedure in order to initiate serial communications with the target SD Card.

Initialization

You will need to re-initialize the Controller after each external reset. This should be carried out in accordance with design requirements and can include:

  • Writing to the Control register with a value that defines the bits as required, including:
     
    • endian bit (CTRL.5)
    • cpha bit (CTRL.4)
    • cpol bit (CTRL.3)
    • cs bit (CTRL.1) – must be '0' to communicate with the SD Card
  • Writing to the Clock Divisor register with the required value for division of the CLK_I signal, to achieve the desired SD_CLK frequency.

Polling SD Card State

Before communications can proceed, you must ensure that an SD Card is inserted into the SD Card reader.

Poll the detect and protect bits in the Card Detection register (CARD_DET(0) and CARD_DET(1) respectively) to ensure that a card is inserted into the SD Card reader, and determine the write status of that card.

To be able to write and read the SD Card, both bits must be '1'. If the protect bit is '0', you will only be able to read from the card.

Data Transfer

Once initialized, data transfer can commence. In order to start the Controller's internal state machine – and hence transmission of data to/reception of data from the SD Card – simply write the data to be transmitted to the required Data register address, depending on the type of transfer you wish to perform:

  • Write to DATA8 for 8-bit transfer
  • Write to DATA16 for 16-bit transfer
  • Write to DATA32 for 32-bit transfer

The data will be written directly to the Transmit Data register (TX_DATA).

The Controller's state machine will generate the serial clock (SD_CLK) and manage the data flow as follows:

  • The data to be transmitted will be copied into an internal shift register.
  • The MSB of this data will be shifted out onto the SD_CMD line (to the SD Card). As the state machine is no longer in the IDLE state, the busy flag is set in the Status register (STATUS.0), indicating that the Controller is transmitting.
  • At the same time, a bit of data is received from the SD Card on the Controller's SD_DAT0 line and shifted into bit 0 of the internal shift register.
  • An internal bit counter keeps track of the transmission, which proceeds until all bits of the data to be transmitted have been sent. At this time, the internal shift register holds a data value received from the SD Card.
  • The valid data is loaded from the internal shift register into the Receive Data register (RX_DATA), ready to be read by the host processor.

Read the appropriate Data register address to retrieve the data from the RX_DATA register, in accordance with the type of transfer being performed (8-, 16-, or 32-bit).

SPI communications is, by definition, clock synchronous –- signals change on one edge of the SD_CLK signal, and the SD_DAT0 (MISO) line is stable and sampled on the other edge (depending on polarity and phase settings).

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