Operating the Logic Analyzer
The host computer is connected to the target Logic Analyzer instrument using the IEEE 1149.1 (JTAG) standard interface. This is the physical interface, providing connection to physical pins of the FPGA device in which the instrument has been embedded. The Nexus 5001 standard is used as the protocol for communications between the host and all devices that are debug-enabled for this protocol. This includes the Logic Analyzers, as well as other Nexus-compliant devices such as OCD-version microcontrollers, frequency generators, counters and digital I/O modules.
All such devices are connected in a chain - the Soft Devices chain - which is determined when the design has been implemented within the target FPGA device and presents in the Devices view, as shown in the figure below. It is not a physical chain, in the sense that you see no external wiring - the connections required between the Nexus-enabled devices are made internal to the FPGA itself.
For instruments such as the LAX, the Nexus protocol enables you to access the registers used for controlling the device. These registers are not exposed as such, rather input to them is provided through an instrument panel, which allows you to:
- Arm the Logic Analyzer ready for capture
- Reset the Logic Analyzer
- Access the LAX panel, from where you can define software triggering and view the content of the sample buffer
- Launch digital and/or analog waveform views for the captured data.
To open the Logic Analyzer Instrument panel, double-click on the LAX icon in the Soft Devices chain.
The Logic Analyzer Options
The Instrument panel for the Logic Analyzer device contains various controls and options that allow you to effectively use the instrument in your design. More specific capture and trigger options are configured in the Logic Analyzer - Options dialog, accessed from the LAX Instrument panel.
The Logic Analyzer can be triggered internally or externally, enabling both software and hardware triggering of the instrument. Selection between the two is determined by the status of the Enable External Trigger option, in the Logic Analyzer - Options dialog (see the section Capturing Data).
Defining a Trigger Pattern
Internal (or Software) triggering and data capture is carried out through the Analyzer's instrument panel. To perform internal triggering of the instrument, ensure that the Enable External Trigger option, in the Logic Analyzer - Options dialog, is disabled.
A software trigger pattern is defined using the controls available in the Logic Analyzer Triggering region of the LAX panel. The trigger pattern applies to the signal set specified in the Trigger from field, in the Capture Control region of the panel. The software trigger pattern for the Logic Analyzer is defined in the LAX panel. This panel is accessed from the device's instrument panel, by clicking on the Show Panel button, in the Data Views region.
Note: If there is more than one logic analyzer instrument in a design, each device will have its own LAX panel associated with it (when launched via the Show Panel button on its corresponding instrument panel).
For a software trigger, the levels of the signals appearing at the instrument's input channels - for the signal set designated as the Trigger from set - are compared against a defined trigger and, when a match occurs, capture of data - for the signal set designated as the Capture set - is initiated.
The actual pattern for the trigger is entered in the Trigger field. Depending on the Capture Width configured for the instrument - 8-, 16-, 32-, or 64-channel - this field will contain 8, 16, 32 or 64 bits. The hexadecimal value for the bit pattern is shown in the field below. Clicking on a bit entry will toggle its value between High (1) and Low (0). Define each bit, corresponding to each of the input signals in the trigger set, as required. Alternatively, enter the required trigger pattern directly as a hexadecimal value.
If multiple specific signals have been defined within the signal set used for triggering, the bits will be divided according to those signals, providing a useful visual aid when constructing the trigger pattern. The hexadecimal value for each signal in the set is shown below its bit pattern, with the overall hexadecimal value for the entire trigger pattern displayed to the right.
The Mask field contains a corresponding number of bits and is used to determine which of the input channels of the trigger signal set will be compared to the trigger pattern defined in the Trigger field. Each bit entry can either be enabled for specific comparison with the corresponding bit in the Trigger field (_) or can be set as a Don't Care (X). Again, the hexadecimal value for the pattern is displayed in the field below.
When the Mask is defined, all channels in the trigger signal set enabled for comparison by the mask must equal their corresponding entries in the Trigger field for data capture to start. If all entries in the Mask field are set as Don't Cares (X), then capture of data for the capture signal set will start immediately.
Advanced Trigger Options
You may not want to capture data immediately upon a match arising between the masked input channels and the trigger pattern. By enabling the Trigger After option in the LAX panel, you are able to enter a value for the number of matches to occur before data capture begins. If the value entered is 0 (default) or 1, capture will commence after the trigger pattern has been matched once. For values entered that are greater than 1, data capture will begin when the specified number of matches have been reached.
The Delay For option in the panel is used to obtain pre-samples - data samples captured before the sample that triggered acquisition of the data. The value entered in this field determines the index entry in the Captured Data region of the LAX panel, at which the value that triggered the Analyzer will be stored. If this field is left blank, zero (default) is assumed and the first entry in the displayed data will be the sample that triggered the Analyzer. If a value greater than zero is entered, a corresponding number of pre-samples will be captured and displayed, before the one that triggered the Analyzer.
If the maximum value for the delay (required number of pre-samples) is reached or exceeded, only Sample Buffer Size-1 pre-samples will be stored and the last sample in the data buffer will be the one that triggered the Analyzer.
When the Logic Analyzer is configured to use 1K, 2K or 4K built-in memory, the maximum values that can be entered in the Delay For option field are:
- 1K: 1023
- 2K: 2047
- 4K: 4095
When the Logic Analyzer is configured to connect to an external memory space, the Sample Buffer Size is determined by:
2 Memsize
where Memsize is the size, in bits, of the physically connected memory address bus. The maximum value that can be entered in the Delay For option field is therefore:
2 Memsize-1
Split-Trigger Mode
Whatever the Capture Width specified for the Analyzer, you have the choice of operating in one of two trigger modes:
- Single n-bit Channel (default, normal operational mode)
- Split n/2-bit Channels
where n is the specified Capture Width, in the Configure (Logic Analyzer) dialog.
The Split-trigger mode essentially turns a single 8/16/32/64-channel Logic Analyzer into two, 4/8/16/32-channel Analyzers, with advanced pre-trigger gating functionality that can be incorporated prior to actual data capture. the figure below shows the Logic Analyzer Triggering region of the LAX panel for a LAX instrument configured to have a Capture Width of 16 and when the Triggering Mode is set to Split 8-Bit Channels.
The figure below illustrates another example of Split-mode triggering, this time for a LAX instrument configured to have a Capture Width of 64.
Magnitude-based Triggering
In Split-trigger mode, the software trigger for each n-channel 'sub-Analyzer' can be defined in terms of either a distinct bit pattern, with input channel masking, or a magnitude-based trigger. By default, the trigger pattern is set to Bit mode. Change to Magnitude mode by enabling the corresponding option in the panel. The trigger definition region will change, as shown in the figure to the right.
When using this mode for triggering, the decimal value obtained from the n-bit input (n=4, 8, 16, or 32) is compared against a specified Threshold value. Triggering depends on the particular comparison test enabled and whether the result of that comparison is True. The various comparison tests that can be used in this mode are summarized below.
| Greater Than | Compares the decimal input value to the specified Threshold value and triggers if it is greater than the threshold. |
| Less Than | Compares the decimal input value to the specified Threshold value and triggers if it is less than the threshold |
| Inside Specified Range | Compares the decimal input value against a range specified by Upper and Lower Threshold values and triggers if it is inside the range |
| Outside Specified Range | Compares the decimal input value against a range specified by Upper and Lower Threshold values and triggers if it is outside the range |
| Greater Than Or Equal To | Compares the decimal input value to the specified Threshold value and triggers if it is greater than or equal to the threshold |
| Less Than Or Equal To | Compares the decimal input value to the specified Threshold value and triggers if it is less than or equal to the threshold |
| Not Equal | Compares the decimal input value to the specified Threshold value and triggers if it is not equal to the threshold |
| Equal | Compares the decimal input value to the specified Threshold value and triggers if it is equal to the threshold |
The range of values that can be entered for the Threshold depends on the resolution of the LAX instrument:
- For a LAX configured to have a Capture Width of 8 - therefore having 4-bit channels in Split-trigger mode - Threshold can be anywhere in the range 0-15, corresponding to the decimal value that can be obtained from the 4-bit input to each 'sub-Analyzer'.
- For a LAX configured to have a Capture Width of 16 - therefore having 8-bit channels in Split-trigger mode - Threshold can be anywhere in the range 0-255, corresponding to the decimal value that can be obtained from the 8-bit input to each 'sub-Analyzer'.
- For a LAX configured to have a Capture Width of 32 - therefore having 16-bit channels in Split-trigger mode - Threshold can be anywhere in the range 0-65535, corresponding to the decimal value that can be obtained from the 16-bit input to each 'sub-Analyzer'.
- For a LAX configured to have a Capture Width of 64 - therefore having 32-bit channels in Split-trigger mode - Threshold can be anywhere in the range 0-4294967295, corresponding to the decimal value that can be obtained from the 32-bit input to each 'sub-Analyzer'.
In each case the range for the Threshold value is cyclic. Considering a LAX with Capture Width 16 (2, 8-bit split channels), if you enter a value for Threshold that is greater than 255, you will effectively be mapped to the corresponding value in the 0-255 range. For example, if you enter 256, the Threshold will in fact be 0. Likewise, entering 300 will equate to 44.
Logical Gating
Prior to the pre-sampling (Delay For) and capture delay (Trigger After) options, the Split-trigger mode also offers gating functionality, to enable a more sophisticated level of triggering to be defined. Of course, you may wish to only trigger using n/2 channels of the device, without the need for a logical combination of the two n/2-channel sub-Analyzers. For this purpose, options are provided in the LAX panel to trigger using either the upper or lower n/2 input channels.
Again the options will depend on the resolution of the LAX:
- 8-channel LAX - CH[7..4] Only and CH[3..0] Only respectively
- 16-channel LAX - CH[15..8] Only and CH[7..0] Only respectively.
- 32-channel LAX - CH[31..16] Only and CH[15..0] Only respectively.
- 64-channel LAX - CH[63..32] Only and CH[31..0] Only respectively.
The figure below shows an example for a 16-channel LAX instrument, where triggering uses only the upper byte.
You could argue that using the instrument in this way is no different to having configured the LAX with a reduced Capture Width, but there is the added bonus of being able to use Magnitude-based triggering and the fact that you can enable either or both sub-Analyzers at the click of an option, rather than having to reconfigure the instrument within the design and then reprocess and reprogram the target device.
Combinatorial logic gating of the outputs of the two trigger sections is provided through the AND, OR and XOR options. An Invert option next to the image for the chosen gate enables three additional logic functions to be obtained - NAND, NOR and XNOR. Invert options are also provided at the output of each trigger matching condition section. When the condition for a trigger is met - either the specified bit pattern is matched or the result of a Magnitude comparison is True - the output of the section will be High ('1'). The added Invert option in each case allows you further control when logically gating the outputs to provide the overall trigger.
The figure below shows an example of using the logical AND of the two 'split' trigger sections to provide a more advanced level of triggering.
In this particular example, a LAX instrument is being used to monitor the input to and output from, a 32-bit VGA Controller which is connected to a TSK3000A processor. Triggering is set to occur when both the IO_ACK_I signal and the CLK_I signal go High, in which case data read from the VGA Controller will be captured by the LAX (provided the Capture signal set includes the IO_DATA_I lines).
Capturing Data
Once the Trigger pattern has been defined, the Logic Analyzer can be set ready for data capture. This is achieved using the controls in either the Actions region of the instrument panel or the Capture Control region of the LAX panel. Pressing the Options button will open the Logic Analyzer - Options dialog (as shown above). Use this dialog to define the following capture-related options:
- Capture Every Clock Edge - use this option to capture data at the same rate as the external system clock. When this option is enabled, the CLK_CAP option is ignored.
- Enable External Trigger - use this option to select whether the device will operate using external (Hardware) triggering or internal (Software) triggering. If enabled, the Analyzer will be triggered externally, using the EXT_TRIGGER input. In this case, any defined software trigger pattern - on the LAX panel - will be ignored. If this option is disabled, external trigger events will be ignored and the trigger defined on the LAX panel will be used.
- Update Display From Core Every - use this field to define the frequency with which the fields on the instrument panel will be refreshed (i.e. read back from the corresponding registers to which they were written and stored, including the read back of data in the sample buffer). Note that read back will only occur when the Analyzer is not armed.
- Abort Capture After - the value entered into this field determines how long the Analyzer will sit in the 'armed' state awaiting a trigger event and, when such an event arises, the time available in which to fill the its sample buffer. The default entry is 3 seconds, which means both triggering and capture must be performed within this period. The rate at which data is captured can vary from design to design and you will need to enter an appropriate value for this capture time - if this abort time is set to low, you may not capture all the intended (or indeed required) data. Bear in mind also, that the bigger the storage memory used for the instrument, the larger the sample buffer and therefore the more time required to fill it.
- Clock Capture Frequency - use this field to define the data capture rate. This value does not affect data capture, rather it is used to scale timing when displaying the data as analog and/or digital waveforms, as well as to define the time events in the Captured Data region of the LAX panel. The value should be set to that of the incoming clock signal on the CLK_CAP pin.
- Capture Signal Set - use this field to nominate the signal set for which you wish to capture data for. The drop-down will list all defined signal sets for the instrument, defined as part of its configuration. The Capture signal set can also be specified in the Capture Control region of the LAX panel.
- Trigger from Signal Set - use this field to nominate the signal set that you wish to trigger off. The drop-down will list all defined signal sets for the instrument, defined as part of its configuration. The Trigger from signal set can also be specified in the Capture Control region of the LAX panel.
- Memory Addr Width - this field is disabled when using the configurable LAX instrument. It is only used when working with one of the legacy LAX_8 or LAX_16 logic analyzer instruments.
- Analog full scale output voltage - use this field to define the full-scale voltage swing for all analog waveforms compiled from the captured data.
Once the options have been defined as required, use the Reset button on the Analyzer's instrument panel to effectively flush the sample buffer. Now press the Arm button. The Logic Analyzer will now be set ready to capture data when the defined trigger pattern is matched and in accordance with other options that may have been set as described earlier in this document.
As the Logic Analyzer sits ready in the armed state, the RED 'Running' LED will appear lit on the instrument panel and the STATUS output will go High. As soon as data is captured and the sample buffer is filled, the GREEN 'Done' LED will light and the STATUS output will go Low.
Running the Logic Analyzer with External Triggering
External (or Hardware) triggering and data capture is carried out using the Analyzer's EXT_TRIGGER input. To perform external triggering of the instrument, ensure that the Enable External Trigger option, in the Logic Analyzer - Options dialog, is enabled.
Irrespective of the trigger mode used (internal or external), the device is armed in exactly the same way - by clicking the Arm button on either the instrument panel or LAX panel. In this armed state, triggering of the instrument now depends solely on the EXT_TRIGGER input. Triggering is level-driven. When a High level is detected at the EXT_TRIGGER input, data capture is initiated. Data will be captured until the entire sample buffer for the instrument is filled.