OpenBus Tutorial - Configuring the Processor Address Space
In the OpenBus System we have built, we have connected slave memory and peripheral devices to the processor's MEM and IO ports respectively. Unlike schematic-based design however, we are not required to manually define the mapping of these devices into the processor's address space, it is handled for us. We have already supplied the mapping information through the respective configuration dialogs. The OpenBus System simply takes this information and maps each device memory or peripheral device accordingly.
Within the OpenBus System, defined memories and peripheral I/O devices will be automatically mapped into the processor's address space. The mapping is dynamic – any changes made to physical memory devices or peripheral I/O (e.g. base addresses) will be reflected directly in the associated memory and peripheral configuration dialogs for the processor.
Mapping physical memory
Let's take a look at the mapping of physical device memories into the processor's address space.
- In the OpenBus System document, right-click on the processor component and choose the Configure Processor Memory command from the menu that appears. The Configure Processor Memory dialog appears. Verify that the physical memory (device memory) defined in the OpenBus System has been automatically mapped into the processor's address space. For our system, we have two blocks of device memory mapped into the processor – the internal processor memory (named
MCU
) and the external SRAM (namedXRAM
), as shown in Figure 1.
- Ensure that the option to generate hardware.h (C Header File) is enabled.
Mapping peripheral I/O
Now let's take a look at the mapping of peripheral devices into the processor's address space.
- In the OpenBus System document, right-click on the processor component and choose the Configure Processor Peripheral command from the menu that appears. The Configure Peripherals dialog appears. Verify that the peripheral devices defined in the OpenBus System have been automatically mapped into the processor's address space. For our system, we have four mapped peripherals – the Port I/O Unit (named
GPIO
), the Serial Peripheral Interface Controller (namedSPI
), the 32-bit VGA Controller with TFT interface (namedVGA
) and the Floating Point Unit (namedFPU
), as shown in Figure 2.
- The option to generate hardware.h (C Header File) is already enabled, since we enabled it when verifying the device memory mapping.