Getting Started Tutorial - Targeting the Design to the FPGA Device

Now we are finished with the capture phase of our design, we need to specify which physical FPGA device we want to use – the target for our design and the end medium into which the design will ultimately be programmed and run. For this tutorial, we will target an FPGA device located on a 3-connector daughter board that is plugged into the Desktop NanoBoard NB2DSK01.

The process of mapping or constraining a design to its physical implementation is done by creating constraint files – files that specify implementation detail such as the target device, the port-to-pin mapping, pin IO standards, and so on. The minimum information required to synthesize a design is the device specification.

Sets of constraint files are targeted to a design by creating a configuration, which is simply a named list of constraint files.

The constraint system in place for the Desktop NanoBoard NB2DSK01 utilizes various constraint files covering:

• Resources and pin-mapping local to the NB2DSK01 motherboard and satellite peripheral and daughter boards

• Connection of a satellite board (peripheral boards and daughter boards) to the NB2DSK01 motherboard.

Although an FPGA design project targeting the Desktop NanoBoard can be configured manually – by adding a configuration, assigning the required board constraint files and creating a mapping constraint file by hand – the process is greatly simplified through use of an auto-configuration feature.
 

 
Using this feature, a target configuration for the FPGA design project is automatically created. The required board-level constraint files are then automatically determined and added to this configuration, based on the hardware (motherboard, daughter board and peripheral boards) detected in your system. An additional mapping constraint file is also generated and added to the configuration, which handles connection of the satellite boards detected in the system (daughter board and any peripheral boards), to the main motherboard.

Note: Although older, 2-connector Altium daughter boards can be used with the Desktop NanoBoard NB2DSK01, they do not possess the memory device required for auto-configuration.

Let's go ahead and configure our FPGA project.

• Prior to using the auto-configuration feature, ensure the following:
  • The 3-connector daughter board carrying the FPGA device to which the design will be targeted is plugged into the NB2DSK01 motherboard.
  • Our simple counter design does not use any resources resident on plug-in peripheral boards. These boards can be left attached to the motherboard, or removed, as required.
  • The NB2DSK01 is connected to the PC via USB (or parallel) connection and is powered-on.

• Open the Devices view (View » Devices View). Enable the Live option and ensure that the Connected indicator is Green.

• The auto-configuration feature can be accessed and run in two ways. For the purposes of this introductory tutorial, it is worth taking a look at both of these methods. For this step, pick only one of the following methods to run the auto-configuration process:

Method 1: Right-click on the icon for the Desktop NanoBoard – in the NanoBoard chain of the view - and from the menu that appears choose Configure Fpga Project » Simple_Counter.PrjFpg (Figure 1).

Figure 1. Auto-configure direct from the Devices view.

Method 2: Double-click on the icon for the Desktop NanoBoard to access its corresponding instrumentation in the Instrument Rack – NanoBoard Controllers panel. Then click on the Board View button to access the NanoBoard Configuration dialog. Use the Auto Configure FPGA Project drop-down at the bottom-left of the dialog and choose Simple_Counter.PrjFpg (Figure 2). By using the dialog, you are presented with a visual (and dynamic) summary of your current Desktop NanoBoard NB2DSK01 system. The image in the dialog displays the specific peripheral board(s) and daughter board that are physically plugged in to the NB2DSK01 motherboard.

Figure 2. Auto-configure from the visually-based NanoBoard Configuration dialog.

The auto-configuration process will proceed, which involves the following:

• A configuration is created and added to the Simple_Counter project. The name for the configuration will depend on the version of your Desktop NanoBoard and the particular daughter board being used. The generic format for the name is:
  motherboard code_revision_daughter board code_revision
  For example, with a Desktop NanoBoard NB2DSK01 (revision 8), and a Xilinx Spartan-3 daughter board DB30 (revision 6), the configuration will be named NB2DSK01_08_DB30_06.

• Constraint files will then be added to the configuration for each of the detected boards in the system (motherboard, daughter board and peripheral board(s)). These are sourced from the \Library\Fpga\NB2 Constraint Files folder of the installation. In each case, the file used will be determined by the type and version of board. For example, if you are using a Xilinx Spartan-3 daughter board DB30 (revision 6), then the constraint file retrieved and added to the configuration will be DB30.06.Constraint.

• The constraint file that defines the mapping of daughter board and peripheral board(s) to the motherboard is also created, on-the-fly, and added to the configuration. The name of this file will simply be that of the configuration itself, with the additional suffix '_BoardMapping' (e.g. NB2DSK01_08_DB30_06_BoardMapping.Constraint). The file will be saved to the same location as the project file (Simple_Counter.PrjFpg) itself.

• The configuration and assigned constraint files will appear listed in the Configuration Manager dialog, as shown in Figure 3.

Figure 3. Resulting configuration and constituent constraint files for the Simple_Counter project.

Click OK. A sub-folder named Settings will be added to the project and appear listed in the Projects panel. The constraint files themselves will be listed in the sub-folder Constraint Files.

Figure 4. Constraint files added to configuration.

• Save the project file.

We have now finished configuring the design. It is targeted to the daughter board FPGA device and is now ready to be processed and ultimately programmed into that device.

See Also

Design Portability, Configurations and Constraints.
Understanding the Desktop NanoBoard NB2DSK01 Constraint System.