FPGA-Specific Constraint - FPGA_CLOCK_FREQUENCY
Frozen Content
Summary: Sets the desired frequency of the clock, the place and route tool will attempt to achieve this frequency (but they do not guarantee that it will).
Values: Number followed by units. ie 50 Mhz etc
TargetKind: Port
Define as: Constraint file entry, Port Parameter
Vendors: Actel, Altera, Lattice, Xilinx