Connecting Multiple Memory Devices
Frozen Content
The nature of your FPGA design may warrant the use of several memory devices, possibly of differing type, each of which requires to be mapped into a specific location within the processor's address space. Within the OpenBus System, this can be readily achieved through use of an Interconnect component.
Figure 1 illustrates the use of an Interconnect component to connect to SRAM, SDRAM and Block RAM, via the corresponding, and appropriately-configured, memory controllers.