WB_FPU - Accessible Internal Registers

Internal registers within the WB_FPU are not accessed directly. Their content is loaded or accessed by writing to/reading from a particular address (highlighted using a gray background in the block diagram for the peripheral). The following sections summarize each of these addresses.

Status Address (STATUS)

Address: 0h
Access: Read only
Internal Register Accessed: BUSY

This address is used to access the BUSY register, which is used to determine the state of the calculation and conversion units – which are still busy and which are ready.

Operand A Address (OPA)

Address: 1h

Access: Write only

Write to this address to:

• Load a 32-bit integer value directly into the Integer to Float Unit for processing.

• Load an IEEE 754-formatted value directly into the Denormalization Unit associated with Operand A.

Writing to this address will cause the calculation units, the Float to Integer Unit and the Normalization units to be reset. The BUSY register will be loaded with all '1's during this time. The WB_FPU will send an Acknowledge signal that it has received the loaded data.

Operand B Address (OPB)

Address: 2h

Access: Write

Write to this address to load an IEEE 754-formatted value directly into the Denormalization Unit associated with Operand B.

Writing to this address will cause the calculation units, the Float to Integer Unit and the Normalization Units to be reset. The BUSY register will be loaded with all '1's during this time. The WB_FPU will send an Acknowledge signal that it has received the loaded data.
 

Addition Result Address (ADD)

Address: 2h

Access: Read

Internal Register Accessed: ADD_RES

This address is used to access the ADD_RES register, containing the normalized result of OPA + OPB. The resulting floating-point value will be set to infinity on overflow.
 

Subtraction Result Address (SUB)

Address: 3h

Access: Read

Internal Register Accessed: SUB_RES

This address is used to access the SUB_RES register, containing the normalized result of OPA - OPB. The resulting floating-point value will be set to infinity on overflow.
 

Dual Operand Loading

Provided you are performing a Write (WE_I input High) to address 3h, you can load the same floating-point value for both operands (OPA and OPB) simultaneously. You can then read the ADD_RES register (address 2h) or MUL_RES register (address 4h) to obtain a cheap 2x or x ² result.

Multiplication Result Address (MUL)

Address: 4h

Access: Read only

Internal Register Accessed: MUL_RES

This address is used to access the MUL_RES register, containing the normalized result of OPA * OPB. The resulting floating-point value will be set to infinity on overflow and zero on underflow.

Division Result Address (DIV)

Address: 5h

Access: Read only

Internal Register Accessed: DIV_RES

This address is used to access the DIV_RES register, containing the normalized result of OPA / OPB. The resulting floating-point value will be set to infinity on overflow or divide-by-zero, zero on underflow, and NaN for zero/zero.

Integer to Float Result Address (ITOF)

Address: 6h

Access: Read only

Internal Register Accessed: ITOF_RES

This address is used to access the ITOF_RES register, containing the normalized result of the conversion from 32-bit integer value into IEEE 754-formatted floating-point value.

Float to Integer Result Address (FTOI)

Address: 7h

Access: Read only

Internal Register Accessed: ITOF_RES

This address is used to access the FTOI_RES register, containing the result of the conversion from IEEE 754-formatted floating-point value into 32-bit integer.