TSK3000A Generic Instruction - OR
Frozen Content
Instruction: Bitwise Logical OR
| Assembler Format | Example | Translates to... |
|---|---|---|
or rC, rB | or $3, $4 | or rC, rC, rB (with rA = rC) |
or rC, rA, IMM32 | or $3, $2, 0x12345678 | see note 2 |
or rC, IMM32 (see note 1) | or $3, 0x12345678 | see note 2 |
Notes
- This format can also be written as: or rC, rC, IMM32 (with rA = rC)
- If the signed IMM32 operand fits into an unsigned 16-bit operand, then these two macro formats translate into single ORI machine instructions:
or rC, rA, IMM32
translates to.....
ori rC, rA, IMM16
or rC, IMM32
translates to.....
ori rC, rC, IMM16 (with rA = rC)
If the IMM32 operand does not fit, or has an unknown value, then these two macro formats translate to:
li $at, IMM32
or rC, rA, $at