TSK3000A Generic Instruction - AND
Frozen Content
Instruction: Bitwise Logical AND
Assembler Format | Example | Translates to... |
---|---|---|
and rC, rB | and $3, $4 | and rC, rC, rB (with rA = rC) |
and rC, rA, IMM32 | and $3, $2, 0x12345678 | see note 2 |
and rC, IMM32 (see note 1) | and $3, 0x12345678 | see note 2 |
Notes
- This format can also be written as: and rC, rC, IMM32 (with rA = rC)
- If the signed IMM32 operand fits into an unsigned 16-bit operand, then these two macro formats translate into single ANDI machine instructions:
and rC, rA, IMM32
translates to.....
andi rC, rA, IMM16
and rC, IMM32
translates to.....
andi rC, rC, IMM16 (with rA = rC)
If the IMM32 operand does not fit, or has an unknown value, then these two macro formats translate to:
li $at, IMM32
and rC, rA, $at