TSK3000A Core Instruction - SRLV

Instruction:

Shift Right Logical Variable

Assembler Format:

srlv rC, rB, rA

Example:

srlv $3, $4, $5

Description:

Right-shifts the contents of GPR rB (by the number of bits designated by the low-order five bits of GPR rA), zero-fills the high-order (rA _4..0 ) bits and puts the 32-bit result in GPR rC.

Operation:

rC <-- rB >> rA _4..0

Instruction Type:

R-Type

Instruction Fields:

rA = Register index of operand A

rB = Register index of operand B

rC = Register index of destination