TSK3000A Core Instruction - SLLV
Frozen Content
Instruction: | Shift Left Logical Variable |
Assembler Format: | sllv rC, rB, rA |
Example: | sllv $3, $4, $5 |
Description: | Left-shifts the contents of GPR rB (by the number of bits designated by the low-order five bits of GPR rA), zero-fills the low-order bits and puts the 32-bit result in GPR rC. |
Operation: | rC <-- rB << rA 4..0 |
Instruction Type: | R-Type |
Instruction Fields: | rA = Register index of operand A (shift amount) rB = Register index of operand B rC = Register index of destination |
Encoding:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | rA | rB | rC | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 |
Latency: 1
Notes
SLAV is identical to SLLV and can be used wherever SLLV is used.