TSK3000A Core Instruction - SH
Frozen Content
| Instruction: | Store Halfword |
| Assembler Format: | sh rB, IMM16(rA) |
| Example: | sh $3, 2($5) |
| Description: | Generates an unsigned 32-bit effective address by sign-extending the 16-bit immediate value, IMM16, and adding it to the contents of GPR rA. It then stores the least significant halfword of register rB at the resulting effective address. |
| Operation: | Mem16[rA + SignExtend(IMM16)] <-- rB 15..0 |
| Instruction Type: | I-Type |
| Instruction Fields: | rA = Register index of operand A rB = Register index of operand B IMM16 = 16-bit immediate data value |
Encoding:
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 0 | 1 | 0 | 0 | 1 | rA | rB | IMM16 | |||||||||||||||||||||||
Latency: 1