TSK3000A Core Instruction - MULTU
Frozen Content
Instruction: | Multiply Unsigned Word |
Assembler Format: | multu rC, rA, rB |
Example: | multu $3, $4, $5 |
Description: | Multiplies the contents of GPR rA by the contents of GPR rB, treating both operands as 32-bit unsigned positive values. The low-order word of the multiplication result is put in special register LO and also in GPR rC. The high-order word of the result is put in special register HI. If rC is omitted in assembly language, $0 is used as the default value. This instruction cannot raise an integer overflow exception. |
Operation: | HILO <-- (Unsigned) rA * (Unsigned) rB |
Instruction Type: | R-Type |
Instruction Fields: | rA = Register index of operand A rB = Register index of operand B rC = Register index of destination |
Encoding:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | rA | rB | rC | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 |
Latency: 1