TSK3000A Core Instruction - LW

Frozen Content

Instruction:

Load Word

Assembler Format:

lw rB, IMM16(rA)

Example:

lw $3, 0($5)

Description:

Generates a 32-bit effective address by sign-extending the 16-bit immediate value, IMM16, and adding it to the contents of GPR rA. It then loads the word at the memory location pointed to by the effective address into GPR rB.

Operation:

rB <-- Mem32[rA + SignExtend(IMM16)]

Instruction Type:

I-Type

Instruction Fields:

rA = Register index of operand A (base address)

rB = Register index of destination

IMM16 = 16-bit immediate data value

Encoding:

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 0 0 0 1 1
rA
rB
IMM16

Latency: 1

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