TSK3000A Core Instruction - LH

Instruction:

Load Halfword

Assembler Format:

lh rB, IMM16(rA)

Example:

lh $3, 2($5)

Description:

Generates a 32-bit effective address by sign-extending the 16-bit immediate value, IMM16, and adding it to the contents of GPR rA. It then sign-extends the halfword at the memory location pointed to by the effective address and loads the result into GPR rB.

Operation:

rB <-- SignExtend(Mem16[rA + SignExtend(IMM16)])

Instruction Type:

I-Type

Instruction Fields:

rA = Register index of operand A (base address)

rB = Register index of destination

IMM16 = 16-bit immediate data value