TSK3000A Core Instruction - JR
Frozen Content
Instruction: | Jump Register |
Assembler Format: | jr rA |
Example: | jr $3 |
Description: | Causes the program to jump unconditionally to the address in GPR rA after a delay of one instruction cycle. Since instructions must be aligned on a word boundary, the two low-order bits of target register rA must be 00. |
Operation: | PC <-- rA |
Instruction Type: | R-Type |
Instruction Fields: | rA = Index of register containing jump address |
Encoding:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | rA | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 |
Latency: 1