TSK3000A Core Instruction - BNE

Frozen Content

Instruction:

Branch On Not Equal

Assembler Format:

bne rA, rB, target

Example:

bne $3, $4, _myfunc

Description:

Generates a branch target address by adding the address of the instruction in the delay slot to a signed offset (a 16-bit immediate value, IMM16, calculated from the target operand, left-shifted two bits and sign-extended to 32 bits). The contents of GPRs rA and rB are compared and, if not equal, the program branches to the target address after a delay of one instruction cycle.

Operation:

If rA <> rB Then
   PC <-- PC + 4 + SignExtend(IMM16 * 4)
Else
   PC <-- PC + 4

Instruction Type:

I-Type

Instruction Fields:

rA = Register index of operand A

rB = Register index of operand B

target = a symbolic address label or a hard-coded PC-offset in bytes

Encoding:

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 1 0 1
rA
rB
IMM16

Latency: 1

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