TSK3000A Core Instruction - BLTZAL

Frozen Content

Instruction:

Branch On Less Than Zero And Link

Assembler Format:

bltzal rA, target

Example:

bltzal $3, _myfunc

Description:

Generates a branch target address by adding the address of the instruction in the delay slot to a signed offset (a 16-bit immediate value, IMM16, calculated from the target operand, left-shifted two bits and sign-extended to 32 bits). The address of the instruction following the instruction in the delay slot is unconditionally placed in general purpose register r31 as the return address from the branch. If the value in GPR rA is negative (i.e. the sign bit of rA is 1), the program branches to the target address after a delay of one instruction cycle. Register r31 should not be used for rA, as this would prevent the instruction from restarting.

Operation:

If rA < 0 Then
   PC <-- PC + 4 + SignExtend(IMM16 * 4)
   GPR[31] <-- PC + 8
Else
   PC <-- PC + 4

Instruction Type:

I-Type

Instruction Fields:

rA = Register index of operand A

target = a symbolic address label or a hard-coded PC-offset in bytes

Encoding:

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 1
rA
1 0 0 0 0
IMM16

Latency: 1

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