TSK3000A Core Instruction - BEQ

Instruction:

Branch On Equal

Assembler Format:

beq rA, rB, target

Example:

beq t2, $0, _myfunc

Description:

Generates a branch target address by adding the address of the instruction in the delay slot to a signed offset (a 16-bit immediate value, IMM16, calculated from the target operand, left-shifted two bits and sign-extended to 32 bits). The contents of GPRs rA and rB are compared and, if equal, the program branches to the target address after a delay of one instruction cycle.

Operation:

If rA = rB Then

PC <-- PC + 4 + SignExtend(IMM16 * 4)

Else

PC <-- PC + 4

Instruction Type:

I-Type

Instruction Fields:

rA = Register index of operand A

rB = Register index of operand B

target = a symbolic address label or a hard-coded PC-offset in bytes