TSK3000A Core Instruction - AND

Instruction:                      Bitwise Logical AND

Assembler Format:       and rC, rA, rB

Example:                          and $3, $4, $5

Description:                     Bitwise logically ANDs the contents of GPRs rA and rB and puts the result in GPR rC.

Operation:                        rC <-- rA ^ rB

Instruction Type:            R-Type

Instruction Fields:          rA = Register index of operand A

                                            rB = Register index of operand B

                                            rC = Register index of destination

Encoding:

Latency: 1