TSK3000A - Jump Instructions

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Jump instructions change the program flow. These instructions will delay the pipeline by one instruction cycle, however an instruction inserted into the delay slot (the instruction immediately following a jump instruction) can be executed while the instruction at the branch target address is being fetched.

Jump and Jump And Link instructions, which are typically used to call subroutines, have the J-type instruction format. For these instructions the jump target address is generated as follows: The 26-bit immediate value for the target address of the instruction, IMM26, is left-shifted two bits and combined with the high-order four bits of the current Program Counter (PC) value, to form a 32-bit absolute address. This becomes the branch target address of the jump instruction.

The Jump And Link instruction puts the return address in register r31.

Jump Register and Jump And Link Register instructions have the R-type instruction format, which is used for returns from subroutines and long-distance jumps to anywhere in the entire 32-bit address space. The register value in this format is a 32-bit byte address.

Note: In the following table the IMM26 operand can be an absolute offset or a symbolic address label.

Table 1. Jump Instructions.
  Mnemonic  
    Instruction    
Description

J IMM26

Jump

Generates a jump target address by left-shifting the 26-bit immediate value, IMM26, by two bits and combining the result with the high-order 4 bits of the address of the instruction in the delay slot. The program jumps unconditionally to this address after a delay of one instruction cycle

JAL IMM26

Jump And Link

Generates a jump target address by left-shifting the 26-bit immediate value, IMM26, by 2 bits and combining the result with the high-order 4 bits of the address of the instruction in the delay slot. The program jumps unconditionally to this address after a delay of one instruction cycle. The address of the instruction following the instruction in the delay slot is placed in general purpose register r31 as the return address from the jump

JALR rC, rA

Jump And Link Register

Causes the program to jump unconditionally to the address in GPR rA after a delay of one instruction cycle. The address of the instruction following the delay slot is put in GPR rC as the return address from the jump. If rC is omitted from the assembly language instruction, r31 is used as the default value. rA and rC must not be equal, since such an instruction would not have the same result if re-executed

JR rA

Jump Register

Causes the program to jump unconditionally to the address in GPR rA after a delay of one instruction cycle

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